From 1c1bb55d3008c95f021b3b91822a76c11ac76a0c Mon Sep 17 00:00:00 2001 From: richardbarry Date: Tue, 16 Apr 2013 14:16:30 +0000 Subject: [PATCH] Add barrier instructions to the GCC CM3 ports. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1857 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- FreeRTOS/Source/portable/GCC/ARM_CM0/port.c | 21 ++++++++----- .../Source/portable/GCC/ARM_CM0/portmacro.h | 8 +++-- FreeRTOS/Source/portable/GCC/ARM_CM3/port.c | 2 +- .../Source/portable/GCC/ARM_CM3/portmacro.h | 8 +++-- .../Source/portable/GCC/ARM_CM3_MPU/port.c | 19 ++++++++---- FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c | 25 ++++++++++------ .../Source/portable/GCC/ARM_CM4F/portmacro.h | 30 ++++++++++--------- 7 files changed, 70 insertions(+), 43 deletions(-) diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c index afc0cfa12..4c2b223dc 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -210,10 +210,15 @@ void vPortEndScheduler( void ) } /*-----------------------------------------------------------*/ -void vPortYieldFromISR( void ) +void vPortYield( void ) { /* Set a PendSV to request a context switch. */ *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET; + + /* Barriers are normally not required but do ensure the code is completely + within the specified behaviour for the architecture. */ + __asm volatile( "dsb" ); + __asm volatile( "isb" ); } /*-----------------------------------------------------------*/ @@ -221,6 +226,8 @@ void vPortEnterCritical( void ) { portDISABLE_INTERRUPTS(); uxCriticalNesting++; + __asm volatile( "dsb" ); + __asm volatile( "isb" ); } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h index 18b9b8b8c..65457bc6d 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h @@ -116,9 +116,11 @@ extern "C" { /* Scheduler utilities. */ -extern void vPortYieldFromISR( void ); -#define portYIELD() vPortYieldFromISR() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR() +extern void vPortYield( void ); +#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) ) +#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c index f4090d74a..ad8277339 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c @@ -255,7 +255,7 @@ void vPortEndScheduler( void ) } /*-----------------------------------------------------------*/ -void vPortYieldFromISR( void ) +void vPortYield( void ) { /* Set a PendSV to request a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h index d436e732a..552b3396c 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h @@ -116,9 +116,11 @@ extern "C" { /* Scheduler utilities. */ -extern void vPortYieldFromISR( void ); -#define portYIELD() vPortYieldFromISR() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR() +extern void vPortYield( void ); +#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) ) +#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT /*-----------------------------------------------------------*/ /* Critical section management. */ diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c index 913b03fca..9b564e9a5 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -290,6 +290,13 @@ unsigned char ucSVCNumber; break; case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; + /* Barriers are normally not required + but do ensure the code is completely + within the specified behaviour for the + architecture. */ + __asm volatile( "dsb" ); + __asm volatile( "isb" ); + break; case portSVC_RAISE_PRIVILEGE : __asm volatile diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c index 213b71277..0b06b64cf 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -92,14 +92,12 @@ #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) ) #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) ) #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) ) -#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) ) #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) ) /* ...then bits in the registers. */ #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL ) #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL ) #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL ) #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL ) -#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL ) #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL ) @@ -279,10 +277,15 @@ void vPortEndScheduler( void ) } /*-----------------------------------------------------------*/ -void vPortYieldFromISR( void ) +void vPortYield( void ) { /* Set a PendSV to request a context switch. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; + + /* Barriers are normally not required but do ensure the code is completely + within the specified behaviour for the architecture. */ + __asm volatile( "dsb" ); + __asm volatile( "isb" ); } /*-----------------------------------------------------------*/ @@ -290,6 +293,8 @@ void vPortEnterCritical( void ) { portDISABLE_INTERRUPTS(); uxCriticalNesting++; + __asm volatile( "dsb" ); + __asm volatile( "isb" ); } /*-----------------------------------------------------------*/ @@ -473,6 +478,8 @@ void xPortSysTickHandler( void ) if( xModifiableIdleTime > 0 ) { __asm volatile( "wfi" ); + __asm volatile( "dsb" ); + __asm volatile( "isb" ); } configPOST_SLEEP_PROCESSING( xExpectedIdleTime ); diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h index e99354d6f..e4dafe1de 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -81,7 +81,7 @@ extern "C" { #endif /*----------------------------------------------------------- - * Port specific definitions. + * Port specific definitions. * * The settings in this file configure FreeRTOS correctly for the * given hardware and compiler. @@ -106,19 +106,21 @@ extern "C" { typedef unsigned portLONG portTickType; #define portMAX_DELAY ( portTickType ) 0xffffffff #endif -/*-----------------------------------------------------------*/ +/*-----------------------------------------------------------*/ /* Architecture specifics. */ #define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) +#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) #define portBYTE_ALIGNMENT 8 -/*-----------------------------------------------------------*/ +/*-----------------------------------------------------------*/ /* Scheduler utilities. */ -extern void vPortYieldFromISR( void ); -#define portYIELD() vPortYieldFromISR() -#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR() +extern void vPortYield( void ); +#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) ) +#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT /*-----------------------------------------------------------*/ /* Critical section management. */ @@ -133,7 +135,7 @@ extern void vPortClearInterruptMask( unsigned long ulNewMaskValue ); #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() -/* There are an uneven number of items on the initial stack, so +/* There are an uneven number of items on the initial stack, so portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */ #define portALIGNMENT_ASSERT_pxCurrentTCB ( void ) -- 2.39.5