From 1e21ba8f6d0708fe7f44066059927cfa6bfedf7a Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 4 Nov 2009 13:01:38 -0600 Subject: [PATCH] ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB We can use fsl_setup_hose to determine if we are a agent/end-point or a host. Rather than using some SoC specific register we can just look at the PCI cfg space of the host controller to determine this. Signed-off-by: Kumar Gala --- board/freescale/p1_p2_rdb/pci.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c index 4c08f9efa0..6fd6963f0c 100644 --- a/board/freescale/p1_p2_rdb/pci.c +++ b/board/freescale/p1_p2_rdb/pci.c @@ -43,7 +43,7 @@ void pci_init_board(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); struct fsl_pci_info pci_info[2]; - u32 devdisr, pordevsr, io_sel, host_agent; + u32 devdisr, pordevsr, io_sel; int first_free_busno = 0; int num = 0; @@ -52,21 +52,19 @@ void pci_init_board(void) devdisr = in_be32(&gur->devdisr); pordevsr = in_be32(&gur->pordevsr); io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; - host_agent = (in_be32(&gur->porbmsr) & MPC85xx_PORBMSR_HA) >> 16; - debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", - devdisr, io_sel, host_agent); + debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) printf (" eTSEC2 is in sgmii mode.\n"); puts("\n"); #ifdef CONFIG_PCIE2 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 2); + pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs); printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); @@ -81,11 +79,11 @@ void pci_init_board(void) #endif #ifdef CONFIG_PCIE1 - pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent); pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ SET_STD_PCIE_INFO(pci_info[num], 1); + pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n", pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); -- 2.39.5