From 20f02c3b760d33f67378a9bcff177a8012cd6a17 Mon Sep 17 00:00:00 2001
From: Dipen Dudhat <dipen.dudhat@freescale.com>
Date: Tue, 1 Sep 2009 17:27:00 +0530
Subject: [PATCH] ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk

Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
platform define.  This will enable all the 85xx platforms to use sdhc_clk
based on CONFIG_FSL_ESDHC.

Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 cpu/mpc85xx/speed.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 3ef49b456f..2fdcefb219 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -153,7 +153,7 @@ int get_clocks (void)
 #endif
 	gd->i2c2_clk = gd->i2c1_clk;
 
-#if defined(CONFIG_MPC8536)
+#if defined(CONFIG_FSL_ESDHC)
 	gd->sdhc_clk = gd->bus_clk / 2;
 #endif
 
-- 
2.39.5