From 226ee1c9f1ed9c0801fb59be8aa9c4c8654281f0 Mon Sep 17 00:00:00 2001 From: richardbarry Date: Sat, 8 Jun 2013 18:36:25 +0000 Subject: [PATCH] Update port layers to make better use of the xTaskIncrementTick() return value. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1928 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- .../portable/GCC/ARM7_LPC2000/portISR.c | 75 ++++++++++--------- .../portable/GCC/ARM7_LPC23xx/portISR.c | 10 ++- .../portable/IAR/AtmelSAM7S64/portasm.s79 | 11 ++- .../Source/portable/IAR/MSP430/portext.s43 | 42 +++++------ .../Source/portable/IAR/MSP430X/portext.s43 | 23 +++--- FreeRTOS/Source/portable/IAR/RL78/portasm.s87 | 12 +-- .../Source/portable/MPLAB/PIC24_dsPIC/port.c | 36 +++++---- .../portable/RVDS/ARM7_LPC21xx/portASM.s | 6 +- .../portable/Rowley/MSP430F449/portext.asm | 9 +-- 9 files changed, 123 insertions(+), 101 deletions(-) diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c index 02dbf8eee..c46286a28 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -81,14 +81,14 @@ /* Changes from V2.5.2 - + + The critical section management functions have been changed. These no longer modify the stack and are safe to use at all optimisation levels. The functions are now also the same for both ARM and THUMB modes. Changes from V2.6.0 - + Removed the 'static' from the definition of vNonPreemptiveTick() to + + Removed the 'static' from the definition of vNonPreemptiveTick() to allow the demo to link when using the cooperative scheduler. Changes from V3.2.4 @@ -114,7 +114,7 @@ volatile unsigned long ulCriticalNesting = 9999UL; /* ISR to handle manual context switches (from a call to taskYIELD()). */ void vPortYieldProcessor( void ) __attribute__((interrupt("SWI"), naked)); -/* +/* * The scheduler can only be started from ARM mode, hence the inclusion of this * function here. */ @@ -132,15 +132,15 @@ void vPortISRStartFirstTask( void ) /* * Called by portYIELD() or taskYIELD() to manually force a context switch. * - * When a context switch is performed from the task level the saved task + * When a context switch is performed from the task level the saved task * context is made to look as if it occurred from within the tick ISR. This * way the same restore context function can be used when restoring the context * saved from the ISR or that saved from a call to vPortYieldProcessor. */ void vPortYieldProcessor( void ) { - /* Within an IRQ ISR the link register has an offset from the true return - address, but an SWI ISR does not. Add the offset manually so the same + /* Within an IRQ ISR the link register has an offset from the true return + address, but an SWI ISR does not. Add the offset manually so the same ISR return code can be used in both cases. */ __asm volatile ( "ADD LR, LR, #4" ); @@ -151,31 +151,34 @@ void vPortYieldProcessor( void ) __asm volatile ( "bl vTaskSwitchContext" ); /* Restore the context of the new task. */ - portRESTORE_CONTEXT(); + portRESTORE_CONTEXT(); } /*-----------------------------------------------------------*/ -/* +/* * The ISR used for the scheduler tick. */ void vTickISR( void ) __attribute__((naked)); void vTickISR( void ) { /* Save the context of the interrupted task. */ - portSAVE_CONTEXT(); + portSAVE_CONTEXT(); - /* Increment the RTOS tick count, then look for the highest priority + /* Increment the RTOS tick count, then look for the highest priority task that is ready to run. */ - __asm volatile( "bl xTaskIncrementTick" ); - - #if configUSE_PREEMPTION == 1 - __asm volatile( "bl vTaskSwitchContext" ); - #endif + __asm volatile + ( + " bl xTaskIncrementTick \t\n" \ + " cmp r0, #0 \t\n" \ + " beq SkipContextSwitch \t\n" \ + " bl vTaskSwitchContext \t\n" \ + "SkipContextSwitch: \t\n" + ); /* Ready for the next interrupt. */ T0_IR = portTIMER_MATCH_ISR_BIT; VICVectAddr = portCLEAR_VIC_INTERRUPT; - + /* Restore the context of the new task. */ portRESTORE_CONTEXT(); } @@ -194,7 +197,7 @@ void vTickISR( void ) void vPortDisableInterruptsFromThumb( void ) { - __asm volatile ( + __asm volatile ( "STMDB SP!, {R0} \n\t" /* Push R0. */ "MRS R0, CPSR \n\t" /* Get CPSR. */ "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ @@ -202,14 +205,14 @@ void vTickISR( void ) "LDMIA SP!, {R0} \n\t" /* Pop R0. */ "BX R14" ); /* Return back to thumb. */ } - + void vPortEnableInterruptsFromThumb( void ) { - __asm volatile ( - "STMDB SP!, {R0} \n\t" /* Push R0. */ - "MRS R0, CPSR \n\t" /* Get CPSR. */ - "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ - "MSR CPSR, R0 \n\t" /* Write back modified value. */ + __asm volatile ( + "STMDB SP!, {R0} \n\t" /* Push R0. */ + "MRS R0, CPSR \n\t" /* Get CPSR. */ + "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ + "MSR CPSR, R0 \n\t" /* Write back modified value. */ "LDMIA SP!, {R0} \n\t" /* Pop R0. */ "BX R14" ); /* Return back to thumb. */ } @@ -223,14 +226,14 @@ in a variable, which is then saved as part of the stack context. */ void vPortEnterCritical( void ) { /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ - __asm volatile ( + __asm volatile ( "STMDB SP!, {R0} \n\t" /* Push R0. */ "MRS R0, CPSR \n\t" /* Get CPSR. */ "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ "MSR CPSR, R0 \n\t" /* Write back modified value. */ "LDMIA SP!, {R0}" ); /* Pop R0. */ - /* Now interrupts are disabled ulCriticalNesting can be accessed + /* Now interrupts are disabled ulCriticalNesting can be accessed directly. Increment ulCriticalNesting to keep a count of how many times portENTER_CRITICAL() has been called. */ ulCriticalNesting++; @@ -248,11 +251,11 @@ void vPortExitCritical( void ) if( ulCriticalNesting == portNO_CRITICAL_NESTING ) { /* Enable interrupts as per portEXIT_CRITICAL(). */ - __asm volatile ( - "STMDB SP!, {R0} \n\t" /* Push R0. */ - "MRS R0, CPSR \n\t" /* Get CPSR. */ - "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ - "MSR CPSR, R0 \n\t" /* Write back modified value. */ + __asm volatile ( + "STMDB SP!, {R0} \n\t" /* Push R0. */ + "MRS R0, CPSR \n\t" /* Get CPSR. */ + "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ + "MSR CPSR, R0 \n\t" /* Write back modified value. */ "LDMIA SP!, {R0}" ); /* Pop R0. */ } } diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c index e39026f1c..004010d9a 100644 --- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c +++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c @@ -167,8 +167,14 @@ void vPortYieldProcessor( void ) /* Increment the RTOS tick count, then look for the highest priority task that is ready to run. */ - __asm volatile( "bl xTaskIncrementTick" ); - __asm volatile( "bl vTaskSwitchContext" ); + __asm volatile + ( + " bl xTaskIncrementTick \t\n" \ + " cmp r0, #0 \t\n" \ + " beq SkipContextSwitch \t\n" \ + " bl vTaskSwitchContext \t\n" \ + "SkipContextSwitch: \t\n" + ); /* Ready for the next interrupt. */ T0IR = 2; diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 index 8752bec8a..7536f39ee 100644 --- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 +++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 @@ -74,10 +74,10 @@ vPortStartFirstTask: ; Manual context switch function. This is the SWI hander. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; vPortYieldProcessor: - ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly - ; as if the context was saved during and IRQ + ADD LR, LR, #4 ; Add 4 to the LR to make the LR appear exactly + ; as if the context was saved during and IRQ ; handler. - + portSAVE_CONTEXT ; Save the context of the current task... LDR R0, =vTaskSwitchContext ; before selecting the next task to execute. mov lr, pc @@ -94,10 +94,13 @@ vPortPreemptiveTick: LDR R0, =xTaskIncrementTick ; Increment the tick count - this may wake a task. mov lr, pc BX R0 + + CMP R0, #0 + BEQ SkipContextSwitch LDR R0, =vTaskSwitchContext ; Select the next task to execute. mov lr, pc BX R0 - +SkipContextSwitch LDR R14, =AT91C_BASE_PITC ; Clear the PIT interrupt LDR R0, [R14, #PITC_PIVR ] diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 b/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 index 5ed4f1723..14a5be2b8 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 +++ b/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ #include "FreeRTOSConfig.h" @@ -81,7 +81,7 @@ EXPORT vTickISR EXPORT vPortYield EXPORT xPortStartScheduler - + RSEG CODE /* @@ -94,13 +94,13 @@ */ vTickISR: portSAVE_CONTEXT - + call #xTaskIncrementTick + cmp.w #0x0, R12 + jeq SkipContextSwitch + call #vTaskSwitchContext +SkipContextSwitch: - #if configUSE_PREEMPTION == 1 - call #vTaskSwitchContext - #endif - portRESTORE_CONTEXT /*-----------------------------------------------------------*/ @@ -111,16 +111,16 @@ vTickISR: vPortYield: /* Mimic an interrupt by pushing the SR. */ - push SR + push SR /* Now the SR is stacked we can disable interrupts. */ - dint - + dint + /* Save the context of the current task. */ - portSAVE_CONTEXT + portSAVE_CONTEXT /* Switch to the highest priority task that is ready to run. */ - call #vTaskSwitchContext + call #vTaskSwitchContext /* Restore the context of the new task. */ portRESTORE_CONTEXT @@ -140,14 +140,14 @@ xPortStartScheduler: /* Restore the context of the first task that is going to run. */ portRESTORE_CONTEXT /*-----------------------------------------------------------*/ - + /* Install vTickISR as the timer A0 interrupt. */ ASEG ORG 0xFFE0 + TIMERA0_VECTOR - + _vTickISR_: DC16 vTickISR - + END - + diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 b/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 index fdd710498..a49f8e5a2 100644 --- a/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 +++ b/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ #include "msp430.h" @@ -95,7 +95,7 @@ portSAVE_CONTEXT macro mov_x sp, 0( r12 ) endm /*-----------------------------------------------------------*/ - + portRESTORE_CONTEXT macro mov_x &pxCurrentTCB, r12 @@ -131,11 +131,10 @@ vPortTickISR: portSAVE_CONTEXT calla #xTaskIncrementTick - - #if configUSE_PREEMPTION == 1 - calla #vTaskSwitchContext - #endif - + cmp.w #0x0, R12 + jeq SkipContextSwitch + calla #vTaskSwitchContext +SkipContextSwitch: portRESTORE_CONTEXT /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 index 6da1fb179..d1c02cb9c 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 +++ b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 @@ -86,12 +86,12 @@ vPortStartFirstTask: RSEG CODE:CODE vPortTickISR: - portSAVE_CONTEXT ; Save the context of the current task. - call xTaskIncrementTick ; Call the timer tick function. -#if configUSE_PREEMPTION == 1 - call vTaskSwitchContext ; Call the scheduler to select the next task. -#endif - portRESTORE_CONTEXT ; Restore the context of the next task to run. + portSAVE_CONTEXT ; Save the context of the current task. + call xTaskIncrementTick ; Call the timer tick function. + cmpw ax, #0x00 + skz + call vTaskSwitchContext ; Call the scheduler to select the next task. + portRESTORE_CONTEXT ; Restore the context of the next task to run. reti diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c index afaf56189..d326508c1 100644 --- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c +++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c @@ -56,19 +56,19 @@ *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, and our new fully thread aware and reentrant UDP/IP stack. - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems, who sell the code with commercial support, indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. */ @@ -97,6 +97,12 @@ FreeRTOS.org V4.3.0. */ #define configKERNEL_INTERRUPT_PRIORITY 1 #endif +/* Use _T1Interrupt as the interrupt handler name if the application writer has +not provided their own. */ +#ifndef configTICK_INTERRUPT_HANDLER + #define configTICK_INTERRUPT_HANDLER _T1Interrupt +#endif /* configTICK_INTERRUPT_HANDLER */ + /* The program counter is only 23 bits. */ #define portUNUSED_PR_BITS 0x7f @@ -107,7 +113,7 @@ unsigned portBASE_TYPE uxCriticalNesting = 0xef; #error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 ) #endif -#ifdef MPLAB_PIC24_PORT +#if defined( __PIC24E__ ) || defined ( __PIC24F__ ) || defined( __PIC24FK__ ) || defined( __PIC24H__ ) #ifdef __HAS_EDS__ #define portRESTORE_CONTEXT() \ @@ -151,7 +157,7 @@ unsigned portBASE_TYPE uxCriticalNesting = 0xef; #endif /* __HAS_EDS__ */ #endif /* MPLAB_PIC24_PORT */ -#ifdef MPLAB_DSPIC_PORT +#if defined( __dsPIC30F__ ) || defined ( __dsPIC33E__ ) || defined( __dsPIC33F__ ) #define portRESTORE_CONTEXT() \ asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \ @@ -185,10 +191,14 @@ unsigned portBASE_TYPE uxCriticalNesting = 0xef; #endif /* MPLAB_DSPIC_PORT */ +#ifndef portRESTORE_CONTEXT + #error Unrecognised device selected +#endif + /* * Setup the timer used to generate the tick interrupt. */ -static void prvSetupTimerInterrupt( void ); +void vApplicationSetupTickTimerInterrupt( void ); /* * See header file for description. @@ -196,7 +206,7 @@ static void prvSetupTimerInterrupt( void ); portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) { unsigned short usCode; -portBASE_TYPE i; +unsigned portBASE_TYPE i; const portSTACK_TYPE xInitialStack[] = { @@ -284,7 +294,7 @@ const portSTACK_TYPE xInitialStack[] = portBASE_TYPE xPortStartScheduler( void ) { /* Setup a timer for the tick ISR. */ - prvSetupTimerInterrupt(); + vApplicationSetupTickTimerInterrupt(); /* Restore the context of the first task to run. */ portRESTORE_CONTEXT(); @@ -308,7 +318,7 @@ void vPortEndScheduler( void ) /* * Setup a timer for a regular tick. */ -static void prvSetupTimerInterrupt( void ) +__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void ) { const unsigned long ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1; @@ -353,7 +363,7 @@ void vPortExitCritical( void ) } /*-----------------------------------------------------------*/ -void __attribute__((__interrupt__, auto_psv)) _T1Interrupt( void ) +void __attribute__((__interrupt__, auto_psv)) configTICK_INTERRUPT_HANDLER( void ) { /* Clear the timer interrupt. */ IFS0bits.T1IF = 0; diff --git a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s index 95995e360..dd832a0c0 100644 --- a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s +++ b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s @@ -130,11 +130,13 @@ vPreemptiveTick LDR R0, =xTaskIncrementTick ; Increment the tick count. MOV LR, PC ; This may make a delayed task ready BX R0 ; to run. - + + CMP R0, #0 + BEQ SkipContextSwitch LDR R0, =vTaskSwitchContext ; Find the highest priority task that MOV LR, PC ; is ready to run. BX R0 - +SkipContextSwitch MOV R0, #T0MATCHBIT ; Clear the timer event LDR R1, =T0IR STR R0, [R1] diff --git a/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm b/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm index 85c9421ac..2a16fd976 100644 --- a/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm +++ b/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm @@ -90,11 +90,10 @@ _vTickISR: portSAVE_CONTEXT call #_xTaskIncrementTick - - #if configUSE_PREEMPTION == 1 - call #_vTaskSwitchContext - #endif - + cmp.w #0x00, r15 + jeq _SkipContextSwitch + call #_vTaskSwitchContext +_SkipContextSwitch: portRESTORE_CONTEXT /*-----------------------------------------------------------*/ -- 2.39.5