From 2eb818463639ce798fd5e6fefd7a1124aad06bdc Mon Sep 17 00:00:00 2001
From: RichardBarry <RichardBarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Thu, 29 Jan 2009 20:33:15 +0000
Subject: [PATCH] Add device specific versions of LowLevelInit.c.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@648 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---
 .../{LowLevelInit_Jx3.c => LowLevelInit.c}    |  0
 .../LowLevelInit/LowLevelInit_Hx2.c           | 84 +++++++++++++++++++
 2 files changed, 84 insertions(+)
 rename Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/{LowLevelInit_Jx3.c => LowLevelInit.c} (100%)
 create mode 100644 Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Hx2.c

diff --git a/Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Jx3.c b/Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit.c
similarity index 100%
rename from Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Jx3.c
rename to Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit.c
diff --git a/Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Hx2.c b/Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Hx2.c
new file mode 100644
index 000000000..249850a2a
--- /dev/null
+++ b/Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Hx2.c
@@ -0,0 +1,84 @@
+/*
+	FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+    ***************************************************************************
+    ***************************************************************************
+    *                                                                         *
+    * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *
+    * and even write all or part of your application on your behalf.          *
+    * See http://www.OpenRTOS.com for details of the services we provide to   *
+    * expedite your project.                                                  *
+    *                                                                         *
+    ***************************************************************************
+    ***************************************************************************
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+#include "FreeRTOS.h"
+
+/*-----------------------------------------------------------*/
+
+/* Called by the startup code to initialise the run time system. */
+unsigned portCHAR __low_level_init( void );
+
+/*-----------------------------------------------------------*/
+
+unsigned portCHAR __low_level_init( void )
+{
+unsigned portCHAR resetflag = RESF;
+unsigned portBASE_TYPE i = 0;         
+
+	portDISABLE_INTERRUPTS();         /* disable global interrupts */                      
+
+	PRCMD = 0x00;                     /* On-chip debug mode */
+	PCC  = 0x00;                      /* high speed mode fCPU */
+	VSWC = 0x00;
+	WDTM2 = 0xF;	                  /* Stop watchdog Timer */
+	PLLS = 0x03;                      /* Set PLL stabilisation time */
+	PLLON = 1;                        /* activate PLL */
+	for( i = 0; i <= 2000; i++ )      /* Wait for stabilisation */
+	{
+		portNOP();
+	}
+	while( LOCK )                     /* Wait for PLL frequency stabiliasation */
+	{
+		portNOP();
+	}
+	SELPLL = 1;                       /* Set CPU operation to PLL mode */
+
+	return pdTRUE;
+}
+/*-----------------------------------------------------------*/
-- 
2.39.5