From 2f6bdac60a76d5a64a106d9ff3d1fe5ffeba2dd4 Mon Sep 17 00:00:00 2001 From: Attila Kinali Date: Mon, 10 Oct 2011 15:09:22 +0200 Subject: [PATCH] Add the SAM3N familly to the chip_details table MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Change-Id: Ic122d324eacf6e667ed6008ebb84708be944222c Signed-off-by: Attila Kinali Reviewed-on: http://openocd.zylin.com/29 Reviewed-by: Øyvind Harboe Tested-by: Øyvind Harboe --- src/flash/nor/at91sam3.c | 437 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 437 insertions(+) diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c index 1fe5f620..c46829ef 100644 --- a/src/flash/nor/at91sam3.c +++ b/src/flash/nor/at91sam3.c @@ -73,6 +73,9 @@ // at91sam3s series (has always one flash bank) #define FLASH_BANK_BASE_S 0x00400000 +// at91sam3n series (has always one flash bank) +#define FLASH_BANK_BASE_N 0x00400000 + #define AT91C_EFC_FCMD_GETD (0x0) // (EFC) Get Flash Descriptor #define AT91C_EFC_FCMD_WP (0x1) // (EFC) Write Page #define AT91C_EFC_FCMD_WPL (0x2) // (EFC) Write Page and Lock @@ -832,6 +835,440 @@ static const struct sam3_chip_details all_sam3_details[] = { }, }, }, + + // Start at91sam3n* series + { + .chipid_cidr = 0x29540960, + .name = "at91sam3n4c", + .total_flash_size = 256 * 1024, + .total_sram_size = 24 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 256 * 1024, + .nsectors = 16, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29440960, + .name = "at91sam3n4b", + .total_flash_size = 256 * 1024, + .total_sram_size = 24 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 256 * 1024, + .nsectors = 16, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29340960, + .name = "at91sam3n4a", + .total_flash_size = 256 * 1024, + .total_sram_size = 24 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 256 * 1024, + .nsectors = 16, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29590760, + .name = "at91sam3n2c", + .total_flash_size = 128 * 1024, + .total_sram_size = 16 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 128 * 1024, + .nsectors = 8, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29490760, + .name = "at91sam3n2b", + .total_flash_size = 128 * 1024, + .total_sram_size = 16 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 128 * 1024, + .nsectors = 8, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29390760, + .name = "at91sam3n2a", + .total_flash_size = 128 * 1024, + .total_sram_size = 16 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 128 * 1024, + .nsectors = 8, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29580560, + .name = "at91sam3n1c", + .total_flash_size = 64 * 1024, + .total_sram_size = 8 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 64 * 1024, + .nsectors = 4, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29480560, + .name = "at91sam3n1b", + .total_flash_size = 64 * 1024, + .total_sram_size = 8 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 64 * 1024, + .nsectors = 4, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + + { + .chipid_cidr = 0x29380560, + .name = "at91sam3n1a", + .total_flash_size = 64 * 1024, + .total_sram_size = 8 * 1024, + .n_gpnvms = 3, + .n_banks = 1, + + // System boots at address 0x0 + // gpnvm[1] = selects boot code + // if gpnvm[1] == 0 + // boot is via "SAMBA" (rom) + // else + // boot is via FLASH + // Selection is via gpnvm[2] + // endif + // + // NOTE: banks 0 & 1 switch places + // if gpnvm[2] == 0 + // Bank0 is the boot rom + // else + // Bank1 is the boot rom + // endif +// .bank[0] = { + { + { + .probed = 0, + .pChip = NULL, + .pBank = NULL, + .bank_number = 0, + .base_address = FLASH_BANK_BASE_N, + .controller_address = 0x400e0A00, + .present = 1, + .size_bytes = 64 * 1024, + .nsectors = 4, + .sector_size = 16384, + .page_size = 256, + }, + +// .bank[1] = { + { + .present = 0, + .probed = 0, + .bank_number = 1, + }, + }, + }, + // terminate { .chipid_cidr = 0, -- 2.39.5