From 33761322b0e76549edf182bc3e5e1155029d139d Mon Sep 17 00:00:00 2001 From: rtel Date: Wed, 4 Jun 2014 09:19:16 +0000 Subject: [PATCH] Complete RX64M GCC demo. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2249 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- .../.HardwareDebuglinker | 22 +- .../RX600_RX64M_RSK_GCC_e2studio/.cproject | 39 +- .../Demo/RX600_RX64M_RSK_GCC_e2studio/.info | 8 +- .../RX600_RX64M_RSK_GCC_e2studio/.project | 17 +- .../Project_Generation_Prefrences.prefs | 2 +- .../.settings/language.settings.xml | 2 +- .../RTOSDemo HardwareDebug.launch | 17 +- .../makefile.init | 2 +- .../src/FreeRTOSConfig.h | 3 + .../src/IntQueueTimer.c | 181 +++++++ .../src/IntQueueTimer.h | 74 +++ .../src/ParTest.c | 23 +- .../src/RegTest.S | 302 +++++++++++ .../src/RenesasCode/hardware_setup.c | 98 +++- .../src/RenesasCode/interrupt_handlers.c | 454 ++++++++--------- .../src/RenesasCode/reset_program.asm | 2 +- .../src/RenesasCode/rskrx64mdef.h | 80 +++ .../src/RenesasCode/vector_table.c | 84 ++-- .../RX600_RX64M_RSK_GCC_e2studio/src/main.c | 6 +- .../src/main_full.c | 469 ++++++++++++++++++ .../Source/FreeRTOSConfig.h | 3 + .../Source/IntQueueTimer.c | 4 +- .../Source/main.c | 2 +- 23 files changed, 1538 insertions(+), 356 deletions(-) create mode 100644 FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c create mode 100644 FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h create mode 100644 FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S create mode 100644 FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/rskrx64mdef.h create mode 100644 FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.HardwareDebuglinker b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.HardwareDebuglinker index f69dab62e..262577ac2 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.HardwareDebuglinker +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.HardwareDebuglinker @@ -86,16 +86,8 @@ - - - - - - - - - + @@ -106,11 +98,11 @@ - + - + @@ -121,4 +113,12 @@ + + + + + + + + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.cproject b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.cproject index f95ae0d0f..d06ba07b9 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.cproject +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.cproject @@ -1,28 +1,26 @@ - - - + - - - + + + - + - + - - + + - + - + - + - + - + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.info b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.info index 5b48f0e2f..7b730a057 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.info +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.info @@ -1,7 +1,7 @@ TOOL_CHAIN=KPIT GNURX-ELF Toolchain VERSION=v14.01 -TC_INSTALL=C:\Program Files\KPIT\GNURXv14.01-ELF\rx-ELF\rx-ELF\ +TC_INSTALL=C:\devtools\KPIT\GNURXv14.01-ELF\rx-ELF\rx-ELF\ GCC_STRING=4.7-GNURX_v14.01 -VERSION_IDE=3.06.02.004 -E2STUDIO_VERSION=2.1.0.21 -ACTIVE_CONFIGURATION=HardwareDebug \ No newline at end of file +VERSION_IDE= +ACTIVE_CONFIGURATION=HardwareDebug +E2STUDIO_VERSION=3.0.0.22 diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.project b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.project index cf10d20ef..41c5688f2 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.project +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.project @@ -53,7 +53,7 @@ - 1395316906017 + 1401803846285 src/Common_Demo_Tasks 22 @@ -62,7 +62,7 @@ - 1395316906049 + 1401803846295 src/Common_Demo_Tasks 22 @@ -71,16 +71,7 @@ - 1395316906064 - src/Common_Demo_Tasks - 22 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-Int*.* - - - - 1395316906080 + 1401803846295 src/Common_Demo_Tasks 22 @@ -89,7 +80,7 @@ - 1395316906096 + 1401803846295 src/Common_Demo_Tasks 22 diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/Project_Generation_Prefrences.prefs b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/Project_Generation_Prefrences.prefs index eeb90f90f..3d5cd6f85 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/Project_Generation_Prefrences.prefs +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/Project_Generation_Prefrences.prefs @@ -18,5 +18,5 @@ com.renesas.cdt.rx.HardwareDebug.Compiler.option.generateRXas100output=false com.renesas.cdt.rx.HardwareDebug.Compiler.option.macroDefines=__RX_LITTLE_ENDIAN__\=1; com.renesas.cdt.rx.HardwareDebug.Compiler.option.make64bitDouble=false com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveLibraryFiles=${ProjName};gcc; -com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveSearchDirectories.1899007176="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rx-elf\\\\${GCC_VERSION}"; +com.renesas.cdt.rx.HardwareDebug.Linker.option.archiveSearchDirectories.1899007176="${CONFIGDIR}";"${TCINSTALL}/lib/gcc/rx-elf//${GCC_VERSION}";"${TCINSTALL}/lib/gcc/rx-elf/${GCC_VERSION}"; eclipse.preferences.version=1 diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/language.settings.xml b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/language.settings.xml index 1e6561456..8951044b1 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/language.settings.xml +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/.settings/language.settings.xml @@ -4,7 +4,7 @@ - + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/RTOSDemo HardwareDebug.launch b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/RTOSDemo HardwareDebug.launch index 6977706f6..9cc696805 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/RTOSDemo HardwareDebug.launch +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/RTOSDemo HardwareDebug.launch @@ -9,7 +9,7 @@ - + @@ -20,12 +20,17 @@ + + + + - + + @@ -53,8 +58,8 @@ - - + + @@ -62,10 +67,10 @@ - + - + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/makefile.init b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/makefile.init index b842a0f74..b13215846 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/makefile.init +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/makefile.init @@ -2,4 +2,4 @@ # Automatically-generated file. Do not edit! ################################################################################ -PATH := $(PATH):C:\PROGRA~1\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\bin;C:\PROGRA~1\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\libexec\gcc\rx-elf\4.7-GNURX_v14.01 \ No newline at end of file +PATH := $(PATH):C:\devtools\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\bin;C:\devtools\KPIT\GNURXV~1.01-\rx-ELF\rx-ELF\libexec\gcc\rx-elf\4.7-GNURX_v14.01 \ No newline at end of file diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h index 397951927..56fc25d04 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h @@ -66,6 +66,9 @@ #ifndef FREERTOS_CONFIG_H #define FREERTOS_CONFIG_H +/* Hardware specifics. */ +#include "iodefine.h" + /* Prevent Renesas headers redefining some stdint.h types. */ #define __TYPEDEF__ 1 diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c new file mode 100644 index 000000000..0d04d6781 --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c @@ -0,0 +1,181 @@ +/* + FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that has become a de facto standard. * + * * + * Help yourself get started quickly and support the FreeRTOS * + * project by purchasing a FreeRTOS tutorial book, reference * + * manual, or both from: http://www.FreeRTOS.org/Documentation * + * * + * Thank you! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available from the following + link: http://www.freertos.org/a00114.html + + 1 tab == 4 spaces! + + *************************************************************************** + * * + * Having a problem? Start by reading the FAQ "My application does * + * not run, what could be wrong?" * + * * + * http://www.FreeRTOS.org/FAQHelp.html * + * * + *************************************************************************** + + http://www.FreeRTOS.org - Documentation, books, training, latest versions, + license and Real Time Engineers Ltd. contact details. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +/* + * This file contains the non-portable and therefore RX64M specific parts of + * the IntQueue standard demo task - namely the configuration of the timers + * that generate the interrupts and the interrupt entry points. + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo includes. */ +#include "IntQueueTimer.h" +#include "IntQueue.h" + +#define IPR_PERIB_INTB128 128 +#define IPR_PERIB_INTB129 129 +#define IER_PERIB_INTB128 0x10 +#define IER_PERIB_INTB129 0x10 +#define IEN_PERIB_INTB128 IEN0 +#define IEN_PERIB_INTB129 IEN1 +#define IR_PERIB_INTB128 128 +#define IR_PERIB_INTB129 129 + +void vIntQTimerISR0( void ) __attribute__ ((interrupt)); +void vIntQTimerISR1( void ) __attribute__ ((interrupt)); + +#define tmrTIMER_0_1_FREQUENCY ( 2000UL ) +#define tmrTIMER_2_3_FREQUENCY ( 2001UL ) + +void vInitialiseTimerForIntQueueTest( void ) +{ + /* Ensure interrupts do not start until full configuration is complete. */ + portENTER_CRITICAL(); + { + /* Give write access. */ + SYSTEM.PRCR.WORD = 0xa502; + + /* Cascade two 8bit timer channels to generate the interrupts. + 8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are + utilised for this test. */ + + /* Enable the timers. */ + SYSTEM.MSTPCRA.BIT.MSTPA5 = 0; + SYSTEM.MSTPCRA.BIT.MSTPA4 = 0; + + /* Enable compare match A interrupt request. */ + TMR0.TCR.BIT.CMIEA = 1; + TMR2.TCR.BIT.CMIEA = 1; + + /* Clear the timer on compare match A. */ + TMR0.TCR.BIT.CCLR = 1; + TMR2.TCR.BIT.CCLR = 1; + + /* Set the compare match value. */ + TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); + TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 ); + + /* 16 bit operation ( count from timer 1,2 ). */ + TMR0.TCCR.BIT.CSS = 3; + TMR2.TCCR.BIT.CSS = 3; + + /* Use PCLK as the input. */ + TMR1.TCCR.BIT.CSS = 1; + TMR3.TCCR.BIT.CSS = 1; + + /* Divide PCLK by 8. */ + TMR1.TCCR.BIT.CKS = 2; + TMR3.TCCR.BIT.CKS = 2; + + /* Enable TMR 0, 2 interrupts. */ + TMR0.TCR.BIT.CMIEA = 1; + TMR2.TCR.BIT.CMIEA = 1; + + /* Map TMR0 CMIA0 interrupt to vector slot B number 128 and set + priority above the kernel's priority, but below the max syscall + priority. */ + ICU.SLIBXR128.BYTE = 3; /* Three is TMR0 compare match A. */ + IPR( PERIB, INTB128 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1; + IEN( PERIB, INTB128 ) = 1; + + /* Ensure that the flag is set to 0, otherwise the interrupt will not be + accepted. */ + IR( PERIB, INTB128 ) = 0; + + /* Do the same for TMR2, but to vector 129. */ + ICU.SLIBXR129.BYTE = 9; /* Nine is TMR2 compare match A. */ + IPR( PERIB, INTB129 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2; + IEN( PERIB, INTB129 ) = 1; + IR( PERIB, INTB129 ) = 0; + } + portEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +/* On vector 128. */ +void vIntQTimerISR0( void ) +{ + /* Enable interrupts to allow interrupt nesting. */ + __asm volatile( "setpsw i" ); + + portYIELD_FROM_ISR( xFirstTimerHandler() ); +} +/*-----------------------------------------------------------*/ + +/* On vector 129. */ +void vIntQTimerISR1( void ) +{ + /* Enable interrupts to allow interrupt nesting. */ + __asm volatile( "setpsw i" ); + + portYIELD_FROM_ISR( xSecondTimerHandler() ); +} + + + + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h new file mode 100644 index 000000000..931d27322 --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h @@ -0,0 +1,74 @@ +/* + FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that has become a de facto standard. * + * * + * Help yourself get started quickly and support the FreeRTOS * + * project by purchasing a FreeRTOS tutorial book, reference * + * manual, or both from: http://www.FreeRTOS.org/Documentation * + * * + * Thank you! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available from the following + link: http://www.freertos.org/a00114.html + + 1 tab == 4 spaces! + + *************************************************************************** + * * + * Having a problem? Start by reading the FAQ "My application does * + * not run, what could be wrong?" * + * * + * http://www.FreeRTOS.org/FAQHelp.html * + * * + *************************************************************************** + + http://www.FreeRTOS.org - Documentation, books, training, latest versions, + license and Real Time Engineers Ltd. contact details. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +#ifndef INT_QUEUE_TIMER_H +#define INT_QUEUE_TIMER_H + +void vInitialiseTimerForIntQueueTest( void ); +portBASE_TYPE xTimer0Handler( void ); +portBASE_TYPE xTimer1Handler( void ); + +#endif + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c index 29188184e..ee039886d 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c @@ -75,7 +75,7 @@ #include "partest.h" /* Hardware specifics. */ -//#include "iodefine.h" +#include "rskrx64mdef.h" #define partestNUM_LEDS ( 4 ) @@ -85,14 +85,22 @@ long lParTestGetLEDState( unsigned long ulLED ); void vParTestInitialise( void ) { - /* Port pin configuration is done by the low level set up prior to this - function being called. */ + /* First set the data levels. */ + LED0 = LED_OFF; + LED1 = LED_OFF; + LED2 = LED_OFF; + LED3 = LED_OFF; + + /* Set port direction registers. */ + LED0_PIN_DIR = OUTPUT_PIN; + LED1_PIN_DIR = OUTPUT_PIN; + LED2_PIN_DIR = OUTPUT_PIN; + LED3_PIN_DIR = OUTPUT_PIN; } /*-----------------------------------------------------------*/ void vParTestSetLED( unsigned long ulLED, signed long xValue ) { -#if 0 if( ulLED < partestNUM_LEDS ) { if( xValue != 0 ) @@ -135,13 +143,11 @@ void vParTestSetLED( unsigned long ulLED, signed long xValue ) taskEXIT_CRITICAL(); } } -#endif } /*-----------------------------------------------------------*/ void vParTestToggleLED( unsigned long ulLED ) { -#if 0 if( ulLED < partestNUM_LEDS ) { taskENTER_CRITICAL(); @@ -157,14 +163,13 @@ void vParTestToggleLED( unsigned long ulLED ) } taskEXIT_CRITICAL(); } -#endif } /*-----------------------------------------------------------*/ long lParTestGetLEDState( unsigned long ulLED ) { long lReturn = pdTRUE; -#if 0 + if( ulLED < partestNUM_LEDS ) { switch( ulLED ) @@ -191,7 +196,7 @@ long lReturn = pdTRUE; break; } } -#endif + return lReturn; } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S new file mode 100644 index 000000000..b7169aba4 --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S @@ -0,0 +1,302 @@ +;/* +; FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. +; All rights reserved +; +; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. +; +; *************************************************************************** +; * * +; * FreeRTOS provides completely free yet professionally developed, * +; * robust, strictly quality controlled, supported, and cross * +; * platform software that has become a de facto standard. * +; * * +; * Help yourself get started quickly and support the FreeRTOS * +; * project by purchasing a FreeRTOS tutorial book, reference * +; * manual, or both from: http://www.FreeRTOS.org/Documentation * +; * * +; * Thank you! * +; * * +; *************************************************************************** +; +; This file is part of the FreeRTOS distribution. +; +; FreeRTOS is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License (version 2) as published by the +; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. +; +; >>! NOTE: The modification to the GPL is included to allow you to distribute +; >>! a combined work that includes FreeRTOS without being obliged to provide +; >>! the source code for proprietary components outside of the FreeRTOS +; >>! kernel. +; +; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +; FOR A PARTICULAR PURPOSE. Full license text is available from the following +; link: http://www.freertos.org/a00114.html +; +; 1 tab == 4 spaces! +; +; *************************************************************************** +; * * +; * Having a problem? Start by reading the FAQ "My application does * +; * not run, what could be wrong?" * +; * * +; * http://www.FreeRTOS.org/FAQHelp.html * +; * * +; *************************************************************************** +; +; http://www.FreeRTOS.org - Documentation, books, training, latest versions, +; license and Real Time Engineers Ltd. contact details.; +; +; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, +; including FreeRTOS+Trace - an indispensable productivity tool, a DOS +; compatible FAT file system, and our tiny thread aware UDP/IP stack. +; +; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High +; Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS +; licenses offer ticketed support, indemnification and middleware. +; +; http://www.SafeRTOS.com - High Integrity Systems also provide a safety +; engineered and independently SIL3 certified version for use in safety and +; mission critical applications that require provable dependability. +; +; 1 tab == 4 spaces! +;*/ + + .global _vRegTest1Implementation + .global _vRegTest2Implementation + + .extern _ulRegTest1LoopCounter + .extern _ulRegTest2LoopCounter + + .text + + +;/* This function is explained in the comments at the top of main.c. */ +_vRegTest1Implementation: + + ;/* Put a known value in the guard byte of the accumulators. */ + MOV.L #10, R1 + MVTACGU R1, A0 + MOV.L #20, R1 + MVTACGU R1, A1 + + ;/* Put a known value in each register. */ + MOV.L #1, R1 + MOV.L #2, R2 + MOV.L #3, R3 + MOV.L #4, R4 + MOV.L #5, R5 + MOV.L #6, R6 + MOV.L #7, R7 + MOV.L #8, R8 + MOV.L #9, R9 + MOV.L #10, R10 + MOV.L #11, R11 + MOV.L #12, R12 + MOV.L #13, R13 + MOV.L #14, R14 + MOV.L #15, R15 + + ;/* Put a known value in the hi and low of the accumulators. */ + MVTACHI R1, A0 + MVTACLO R2, A0 + MVTACHI R3, A1 + MVTACLO R4, A1 + + ;/* Loop, checking each itteration that each register still contains the + ;expected value. */ +TestLoop1: + + ;/* Push the registers that are going to get clobbered. */ + PUSHM R14-R15 + + ;/* Increment the loop counter to show this task is still getting CPU time. */ + MOV.L #_ulRegTest1LoopCounter, R14 + MOV.L [ R14 ], R15 + ADD #1, R15 + MOV.L R15, [ R14 ] + + ;/* Yield to extend the text coverage. Set the bit in the ITU SWINTR register. */ + MOV.L #1, R14 + MOV.L #0872E0H, R15 + MOV.B R14, [R15] + NOP + NOP + + ;/* Check accumulators. */ + MVFACHI #0, A0, R15 + CMP #1, R15 + BNE RegTest1Error + MVFACLO #0, A0, R15 + CMP #2, R15 + BNE RegTest1Error + MVFACGU #0, A0, R15 + CMP #10, R15 + BNE RegTest1Error + MVFACHI #0, A1, R15 + CMP #3, R15 + BNE RegTest1Error + MVFACLO #0, A1, R15 + CMP #4, R15 + BNE RegTest1Error + MVFACGU #0, A1, R15 + CMP #20, R15 + BNE RegTest1Error + + ;/* Restore the clobbered registers. */ + POPM R14-R15 + + ;/* Now compare each register to ensure it still contains the value that was + ;set before this loop was entered. */ + CMP #1, R1 + BNE RegTest1Error + CMP #2, R2 + BNE RegTest1Error + CMP #3, R3 + BNE RegTest1Error + CMP #4, R4 + BNE RegTest1Error + CMP #5, R5 + BNE RegTest1Error + CMP #6, R6 + BNE RegTest1Error + CMP #7, R7 + BNE RegTest1Error + CMP #8, R8 + BNE RegTest1Error + CMP #9, R9 + BNE RegTest1Error + CMP #10, R10 + BNE RegTest1Error + CMP #11, R11 + BNE RegTest1Error + CMP #12, R12 + BNE RegTest1Error + CMP #13, R13 + BNE RegTest1Error + CMP #14, R14 + BNE RegTest1Error + CMP #15, R15 + BNE RegTest1Error + + ;/* All comparisons passed, start a new itteratio of this loop. */ + BRA TestLoop1 + +RegTest1Error: + ;/* A compare failed, just loop here so the loop counter stops incrementing + ;- causing the check task to indicate the error. */ + BRA RegTest1Error +;/*-----------------------------------------------------------*/ + +;/* This function is explained in the comments at the top of main.c. */ +_vRegTest2Implementation: + + ;/* Put a known value in the guard byte of the accumulators. */ + MOV.L #1H, R1 + MVTACGU R1, A0 + MOV.L #2H, R1 + MVTACGU R1, A1 + + ;/* Put a known value in each general purpose register. */ + MOV.L #10H, R1 + MOV.L #20H, R2 + MOV.L #30H, R3 + MOV.L #40H, R4 + MOV.L #50H, R5 + MOV.L #60H, R6 + MOV.L #70H, R7 + MOV.L #80H, R8 + MOV.L #90H, R9 + MOV.L #100H, R10 + MOV.L #110H, R11 + MOV.L #120H, R12 + MOV.L #130H, R13 + MOV.L #140H, R14 + MOV.L #150H, R15 + + ;/* Put a known value in the hi and low of the accumulators. */ + MVTACHI R1, A0 + MVTACLO R2, A0 + MVTACHI R3, A1 + MVTACLO R4, A1 + + ;/* Loop, checking each itteration that each register still contains the + ;expected value. */ +TestLoop2: + + ;/* Push the registers that are going to get clobbered. */ + PUSHM R14-R15 + + ;/* Increment the loop counter to show this task is still getting CPU time. */ + MOV.L #_ulRegTest2LoopCounter, R14 + MOV.L [ R14 ], R15 + ADD #1, R15 + MOV.L R15, [ R14 ] + + ;/* Check accumulators. */ + MVFACHI #0, A0, R15 + CMP #10H, R15 + BNE RegTest1Error + MVFACLO #0, A0, R15 + CMP #20H, R15 + BNE RegTest1Error + MVFACGU #0, A0, R15 + CMP #1H, R15 + BNE RegTest1Error + MVFACHI #0, A1, R15 + CMP #30H, R15 + BNE RegTest1Error + MVFACLO #0, A1, R15 + CMP #40H, R15 + BNE RegTest1Error + MVFACGU #0, A1, R15 + CMP #2H, R15 + BNE RegTest1Error + + ;/* Restore the clobbered registers. */ + POPM R14-R15 + + ;/* Now compare each register to ensure it still contains the value that was + ;set before this loop was entered. */ + CMP #10H, R1 + BNE RegTest2Error + CMP #20H, R2 + BNE RegTest2Error + CMP #30H, R3 + BNE RegTest2Error + CMP #40H, R4 + BNE RegTest2Error + CMP #50H, R5 + BNE RegTest2Error + CMP #60H, R6 + BNE RegTest2Error + CMP #70H, R7 + BNE RegTest2Error + CMP #80H, R8 + BNE RegTest2Error + CMP #90H, R9 + BNE RegTest2Error + CMP #100H, R10 + BNE RegTest2Error + CMP #110H, R11 + BNE RegTest2Error + CMP #120H, R12 + BNE RegTest2Error + CMP #130H, R13 + BNE RegTest2Error + CMP #140H, R14 + BNE RegTest2Error + CMP #150H, R15 + BNE RegTest2Error + + ;/* All comparisons passed, start a new itteratio of this loop. */ + BRA TestLoop2 + +RegTest2Error: + ;/* A compare failed, just loop here so the loop counter stops incrementing + ;- causing the check task to indicate the error. */ + BRA RegTest2Error + + + .END diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/hardware_setup.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/hardware_setup.c index de90606a3..bfe7bfa8c 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/hardware_setup.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/hardware_setup.c @@ -15,7 +15,7 @@ /* File Version: V1.00 */ /* Date Generated: 08/07/2013 */ /************************************************************************/ - + #include "iodefine.h" #ifdef __cplusplus extern "C" { @@ -24,23 +24,87 @@ extern void HardwareSetup(void); #ifdef __cplusplus } #endif + + +#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */ +#define _00_CGC_MAINOSC_UNDER24M (0x00U) /* 20.1 to 24 MHz */ +#define _52_CGC_MOSCWTCR_VALUE (0x52U) /* Main Clock Oscillator Wait Time */ +#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */ +#define _00000010_CGC_PCLKC_DIV_2 (0x00000010UL) /* x1/2 */ +#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */ +#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */ +#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */ +#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */ +#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */ +#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */ +#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10.0 */ +#define _0020_CGC_UCLK_DIV_3 (0x0020U) /* x1/3 */ +#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */ + +void R_CGC_Create(void) +{ + /* Set main clock control registers */ + SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _00_CGC_MAINOSC_UNDER24M; + SYSTEM.MOSCWTCR.BYTE = _52_CGC_MOSCWTCR_VALUE; + + /* Set main clock operation */ + SYSTEM.MOSCCR.BIT.MOSTP = 0U; + + /* Wait for main clock oscillator wait counter overflow */ + while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF); + + /* Set system clock */ + SYSTEM.SCKCR.LONG = _00000001_CGC_PCLKD_DIV_2 | _00000010_CGC_PCLKC_DIV_2 | _00000100_CGC_PCLKB_DIV_2 | + _00001000_CGC_PCLKA_DIV_2 | _00010000_CGC_BCLK_DIV_2 | _01000000_CGC_ICLK_DIV_2 | + _10000000_CGC_FCLK_DIV_2; + + /* Set PLL circuit */ + SYSTEM.PLLCR2.BIT.PLLEN = 0U; + SYSTEM.PLLCR.BIT.PLLSRCSEL = 0U; + SYSTEM.PLLCR.WORD = _0001_CGC_PLL_FREQ_DIV_2 | _1300_CGC_PLL_FREQ_MUL_10_0; + + /* Wait for PLL wait counter overflow */ + while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF); + + + /* Disable sub-clock */ + SYSTEM.SOSCCR.BIT.SOSTP = 1U; + + /* Wait for the register modification to complete */ + while (1U != SYSTEM.SOSCCR.BIT.SOSTP); + + /* Set LOCO */ + SYSTEM.LOCOCR.BIT.LCSTP = 0U; + + /* Set UCLK */ + SYSTEM.SCKCR2.WORD = _0020_CGC_UCLK_DIV_3; + + /* Set SDCLK */ + SYSTEM.SCKCR.BIT.PSTOP0 = 1U; + + /* Set clock source */ + SYSTEM.SCKCR3.WORD = _0400_CGC_CLOCKSOURCE_PLL; +} + void HardwareSetup(void) { -/* - BSC.CS0MOD.WORD = 0x1234; - BSC.CS7CNT.WORD = 0x5678; - - SCI0.SCR.BIT.TE = 0; - SCI0.SCR.BIT.RE = 0; - SCI0.SCR.BIT.TE = 1; - SCI2.SSR.BIT.PER = 0; + /* Enable writing to registers related to operating modes, LPC, CGC and software reset */ + SYSTEM.PRCR.WORD = 0xA50BU; + + /* Enable writing to MPC pin function control registers */ + MPC.PWPR.BIT.B0WI = 0U; + MPC.PWPR.BIT.PFSWE = 1U; + + /* Set peripheral settings */ + R_CGC_Create(); + + /* Disable writing to MPC pin function control registers */ + MPC.PWPR.BIT.PFSWE = 0U; + MPC.PWPR.BIT.B0WI = 1U; + + /* Enable protection */ + SYSTEM.PRCR.WORD = 0xA500U; +} + - TMR0.TCR.BYTE = 0x12; - TMR1.TCR.BYTE = 0x12; - TMR2.TCR.BYTE = 0x12; - - P0.DDR.BYTE = 0x12; - P1.DDR.BYTE = 0x12; -*/ -} diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/interrupt_handlers.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/interrupt_handlers.c index 396443e5b..98154af13 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/interrupt_handlers.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/interrupt_handlers.c @@ -18,22 +18,22 @@ #include "interrupt_handlers.h" // Exception(Supervisor Instruction) -void INT_Excep_SuperVisorInst(void){/* brk(); */} +void INT_Excep_SuperVisorInst(void){ __asm volatile( "brk"); } // Exception(Access Instruction) -void INT_Excep_AccessInst(void){/* brk(); */} +void INT_Excep_AccessInst(void){ __asm volatile( "brk"); } // Exception(Undefined Instruction) -void INT_Excep_UndefinedInst(void){/* brk(); */} +void INT_Excep_UndefinedInst(void){ __asm volatile( "brk"); } // Exception(Floating Point) -void INT_Excep_FloatingPoint(void){/* brk(); */} +void INT_Excep_FloatingPoint(void){ __asm volatile( "brk"); } // NMI -void INT_NonMaskableInterrupt(void){/* brk(); */} +void INT_NonMaskableInterrupt(void){ __asm volatile( "brk"); } // Dummy -void Dummy(void){/* brk(); */} +void Dummy(void){ __asm volatile( "brk"); } // BRK void INT_Excep_BRK(void){ /*wait();*/ } @@ -70,254 +70,254 @@ void INT_Excep_BRK(void){ /*wait();*/ } //;0x003C Reserved //;0x0040 BUSERR -void INT_Excep_BSC_BUSERR(void){ } +void INT_Excep_BSC_BUSERR(void){ __asm volatile( "brk"); } //;0x0044 Reserved //;0x0048 RAMERR -void INT_Excep_RAM_RAMERR(void){ }; +void INT_Excep_RAM_RAMERR(void){ __asm volatile( "brk"); }; //;0x004C Reserved //;0x0050 Reserved //;0x0054 FIFERR -void INT_Excep_FCU_FIFERR(void){ }; +void INT_Excep_FCU_FIFERR(void){ __asm volatile( "brk"); }; //;0x0058 Reserved //;0x005C FRDYI -void INT_Excep_FCU_FRDYI(void){ }; +void INT_Excep_FCU_FRDYI(void){ __asm volatile( "brk"); }; //;0x0060 Reserved //;0x0064 Reserved //;0x0068 SWINT2 -void INT_Excep_ICU_SWINT2(void){ }; +void INT_Excep_ICU_SWINT2(void){ __asm volatile( "brk"); }; //;0x006C SWINT -void INT_Excep_ICU_SWINT(void){ }; +void INT_Excep_ICU_SWINT(void){ __asm volatile( "brk"); }; //;0x0070 CMI0 -void INT_Excep_CMT0_CMI0(void){ }; +void INT_Excep_CMT0_CMI0(void){ __asm volatile( "brk"); }; //;0x0074 CMI1 -void INT_Excep_CMT1_CMI1(void){ }; +void INT_Excep_CMT1_CMI1(void){ __asm volatile( "brk"); }; //;0x0078 CMWI0 -void INT_Excep_CMTW0_CMWI0(void){ }; +void INT_Excep_CMTW0_CMWI0(void){ __asm volatile( "brk"); }; //;0x007C CMWI1 -void INT_Excep_CMTW1_CMWI1(void){ }; +void INT_Excep_CMTW1_CMWI1(void){ __asm volatile( "brk"); }; //;0x0080 D0FIFO2 -void INT_Excep_USBHS_D0FIFO2(void){ }; +void INT_Excep_USBHS_D0FIFO2(void){ __asm volatile( "brk"); }; //;0x0084 D1FIFO2 -void INT_Excep_USBHS_D1FIFO2(void){ }; +void INT_Excep_USBHS_D1FIFO2(void){ __asm volatile( "brk"); }; //;0x0088 D0FIFO0 -void INT_Excep_USB0_D0FIFO0(void){ }; +void INT_Excep_USB0_D0FIFO0(void){ __asm volatile( "brk"); }; //;0x008C D1FIFO0 -void INT_Excep_USB0_D1FIFO0(void){ }; +void INT_Excep_USB0_D1FIFO0(void){ __asm volatile( "brk"); }; //;0x0090 Reserved //;0x0094 Reserved //;0x0098 SPRI0 -void INT_Excep_RSPI0_SPRI0(void){ }; +void INT_Excep_RSPI0_SPRI0(void){ __asm volatile( "brk"); }; //;0x009C SPTI0 -void INT_Excep_RSPI0_SPTI0(void){ }; +void INT_Excep_RSPI0_SPTI0(void){ __asm volatile( "brk"); }; //;0x00A0 Reserved //;0x00A4 Reserved //;0x00A8 SPRI -void INT_Excep_QSPI_SPRI(void){ }; +void INT_Excep_QSPI_SPRI(void){ __asm volatile( "brk"); }; //;0x00AC SPTI -void INT_Excep_QSPI_SPTI(void){ }; +void INT_Excep_QSPI_SPTI(void){ __asm volatile( "brk"); }; //;0x00B0 SBFAI -void INT_Excep_SHDI_SBFAI(void){ }; +void INT_Excep_SHDI_SBFAI(void){ __asm volatile( "brk"); }; //;0x00B4 MBFAI -void INT_Excep_MMC_MBFAI(void){ }; +void INT_Excep_MMC_MBFAI(void){ __asm volatile( "brk"); }; //;0x00B8 SSITX0 -void INT_Excep_SSI0_SSITXI0(void){ }; +void INT_Excep_SSI0_SSITXI0(void){ __asm volatile( "brk"); }; //;0x00BC SSIRX0 -void INT_Excep_SSI0_SSIRXI0(void){ }; +void INT_Excep_SSI0_SSIRXI0(void){ __asm volatile( "brk"); }; //;0x00C0 SSIRTI1 -void INT_Excep_SSI1_SSIRTI1(void){ }; +void INT_Excep_SSI1_SSIRTI1(void){ __asm volatile( "brk"); }; //;0x00C4 Reserved //;0x00C8 IDEI -void INT_Excep_SRC_IDEI(void){ }; +void INT_Excep_SRC_IDEI(void){ __asm volatile( "brk"); }; //;0x00CC ODFI -void INT_Excep_SRC_ODFI(void){ }; +void INT_Excep_SRC_ODFI(void){ __asm volatile( "brk"); }; //;0x00D0 RXI0 -void INT_Excep_RIIC0_RXI0(void){ }; +void INT_Excep_RIIC0_RXI0(void){ __asm volatile( "brk"); }; //;0x00D4C TXI0 -void INT_Excep_RIIC0_TXI0(void){ }; +void INT_Excep_RIIC0_TXI0(void){ __asm volatile( "brk"); }; //;0x00D8 RXI2 -void INT_Excep_RIIC2_RXI2(void){ }; +void INT_Excep_RIIC2_RXI2(void){ __asm volatile( "brk"); }; //;0x00DC TXI2 -void INT_Excep_RIIC2_TXI2(void){ }; +void INT_Excep_RIIC2_TXI2(void){ __asm volatile( "brk"); }; //;0x00E0 Reserved //;0x00E4 Reserved //;0x00E8 RXI0 -void INT_Excep_SCI0_RXI0(void){ }; +void INT_Excep_SCI0_RXI0(void){ __asm volatile( "brk"); }; //;0x00EC TXI0 -void INT_Excep_SCI0_TXI0(void){ }; +void INT_Excep_SCI0_TXI0(void){ __asm volatile( "brk"); }; //;0x00F0 RXI1 -void INT_Excep_SCI1_RXI1(void){ }; +void INT_Excep_SCI1_RXI1(void){ __asm volatile( "brk"); }; //;0x00F4 TXI1 -void INT_Excep_SCI1_TXI1(void){ }; +void INT_Excep_SCI1_TXI1(void){ __asm volatile( "brk"); }; //;0x00F8 RXI2 -void INT_Excep_SCI2_RXI2(void){ }; +void INT_Excep_SCI2_RXI2(void){ __asm volatile( "brk"); }; //;0x00FC TXI2 -void INT_Excep_SCI2_TXI2(void){ }; +void INT_Excep_SCI2_TXI2(void){ __asm volatile( "brk"); }; //;0x0100 IRQ0 -void INT_Excep_ICU_IRQ0(void){ }; +void INT_Excep_ICU_IRQ0(void){ __asm volatile( "brk"); }; //;0x0104 IRQ1 -void INT_Excep_ICU_IRQ1(void){ }; +void INT_Excep_ICU_IRQ1(void){ __asm volatile( "brk"); }; //;0x0108 IRQ2 -void INT_Excep_ICU_IRQ2(void){ }; +void INT_Excep_ICU_IRQ2(void){ __asm volatile( "brk"); }; //;0x010C IRQ3 -void INT_Excep_ICU_IRQ3(void){ }; +void INT_Excep_ICU_IRQ3(void){ __asm volatile( "brk"); }; //;0x0110 IRQ4 -void INT_Excep_ICU_IRQ4(void){ }; +void INT_Excep_ICU_IRQ4(void){ __asm volatile( "brk"); }; //;0x0114 IRQ5 -void INT_Excep_ICU_IRQ5(void){ }; +void INT_Excep_ICU_IRQ5(void){ __asm volatile( "brk"); }; //;0x0118 IRQ6 -void INT_Excep_ICU_IRQ6(void){ }; +void INT_Excep_ICU_IRQ6(void){ __asm volatile( "brk"); }; //;0x011C IRQ7 -void INT_Excep_ICU_IRQ7(void){ }; +void INT_Excep_ICU_IRQ7(void){ __asm volatile( "brk"); }; //;0x0120 IRQ8 -void INT_Excep_ICU_IRQ8(void){ }; +void INT_Excep_ICU_IRQ8(void){ __asm volatile( "brk"); }; //;0x0124 IRQ9 -void INT_Excep_ICU_IRQ9(void){ }; +void INT_Excep_ICU_IRQ9(void){ __asm volatile( "brk"); }; //;0x0128 IRQ10 -void INT_Excep_ICU_IRQ10(void){ }; +void INT_Excep_ICU_IRQ10(void){ __asm volatile( "brk"); }; //;0x012C IRQ11 -void INT_Excep_ICU_IRQ11(void){ }; +void INT_Excep_ICU_IRQ11(void){ __asm volatile( "brk"); }; //;0x0130 IRQ12 -void INT_Excep_ICU_IRQ12(void){ }; +void INT_Excep_ICU_IRQ12(void){ __asm volatile( "brk"); }; //;0x0134 IRQ13 -void INT_Excep_ICU_IRQ13(void){ }; +void INT_Excep_ICU_IRQ13(void){ __asm volatile( "brk"); }; //;0x0138 IRQ14 -void INT_Excep_ICU_IRQ14(void){ }; +void INT_Excep_ICU_IRQ14(void){ __asm volatile( "brk"); }; //;0x013C IRQ15 -void INT_Excep_ICU_IRQ15(void){ }; +void INT_Excep_ICU_IRQ15(void){ __asm volatile( "brk"); }; //;0x0140 RXI3 -void INT_Excep_SCI3_RXI3(void){ }; +void INT_Excep_SCI3_RXI3(void){ __asm volatile( "brk"); }; //;0x0144 TXI3 -void INT_Excep_SCI3_TXI3(void){ }; +void INT_Excep_SCI3_TXI3(void){ __asm volatile( "brk"); }; //;0x0148 RXI4 -void INT_Excep_SCI4_RXI4(void){ }; +void INT_Excep_SCI4_RXI4(void){ __asm volatile( "brk"); }; //;0x014C TXI4 -void INT_Excep_SCI4_TXI4(void){ }; +void INT_Excep_SCI4_TXI4(void){ __asm volatile( "brk"); }; //;0x0150 RXI5 -void INT_Excep_SCI5_RXI5(void){ }; +void INT_Excep_SCI5_RXI5(void){ __asm volatile( "brk"); }; //;0x0154 TXI5 -void INT_Excep_SCI5_TXI5(void){ }; +void INT_Excep_SCI5_TXI5(void){ __asm volatile( "brk"); }; //;0x0158 RXI6 -void INT_Excep_SCI6_RXI6(void){ }; +void INT_Excep_SCI6_RXI6(void){ __asm volatile( "brk"); }; //;0x015C TXI6 -void INT_Excep_SCI6_TXI6(void){ }; +void INT_Excep_SCI6_TXI6(void){ __asm volatile( "brk"); }; //;0x0160 COMPA1 -void INT_Excep_LVD1_COMPA1(void){ }; +void INT_Excep_LVD1_COMPA1(void){ __asm volatile( "brk"); }; //;0x0164 COMPA2 -void INT_Excep_LVD2_COMPA2(void){ }; +void INT_Excep_LVD2_COMPA2(void){ __asm volatile( "brk"); }; //;0x0168 USBR0 -void INT_Excep_USB_USBR0(void){ }; +void INT_Excep_USB_USBR0(void){ __asm volatile( "brk"); }; //;0x016C Reserved //;0x0170 ALM -void INT_Excep_RTC_ALM(void){ }; +void INT_Excep_RTC_ALM(void){ __asm volatile( "brk"); }; //;0x0174 PRD -void INT_Excep_RTC_PRD(void){ }; +void INT_Excep_RTC_PRD(void){ __asm volatile( "brk"); }; //;0x0178 HSUSBR -void INT_Excep_USBHS_USBHSR(void){ }; +void INT_Excep_USBHS_USBHSR(void){ __asm volatile( "brk"); }; //;0x017C IWUNI -void INT_Excep_IWDT_IWUNI(void){ }; +void INT_Excep_IWDT_IWUNI(void){ __asm volatile( "brk"); }; //;0x0180 WUNI -void INT_Excep_WDT_WUNI(void){ }; +void INT_Excep_WDT_WUNI(void){ __asm volatile( "brk"); }; //;0x0184 PCDFI -void INT_Excep_PDC_PCDFI(void){ }; +void INT_Excep_PDC_PCDFI(void){ __asm volatile( "brk"); }; //;0x0188 RXI7 -void INT_Excep_SCI7_RXI7(void){ }; +void INT_Excep_SCI7_RXI7(void){ __asm volatile( "brk"); }; //;0x018C TXI7 -void INT_Excep_SCI7_TXI7(void){ }; +void INT_Excep_SCI7_TXI7(void){ __asm volatile( "brk"); }; //;0x0190 RXIF8 -void INT_Excep_SCIF8_RXIF8(void){ }; +void INT_Excep_SCIF8_RXIF8(void){ __asm volatile( "brk"); }; //;0x0194 TXIF8 -void INT_Excep_SCIF8_TXIF8(void){ }; +void INT_Excep_SCIF8_TXIF8(void){ __asm volatile( "brk"); }; //;0x0198 RXIF9 -void INT_Excep_SCIF9_RXIF9(void){ }; +void INT_Excep_SCIF9_RXIF9(void){ __asm volatile( "brk"); }; //;0x019C TXIF9 -void INT_Excep_SCIF9_TXIF9(void){ }; +void INT_Excep_SCIF9_TXIF9(void){ __asm volatile( "brk"); }; //;0x01A0 RXIF10 -void INT_Excep_SCIF10_RXIF10(void){ }; +void INT_Excep_SCIF10_RXIF10(void){ __asm volatile( "brk"); }; //;0x01A4 TXIF10 -void INT_Excep_SCIF10_TXIF10(void){ }; +void INT_Excep_SCIF10_TXIF10(void){ __asm volatile( "brk"); }; //;0x01A8 GROUPBE0 -void INT_Excep_ICU_GROUPBE0(void){ }; +void INT_Excep_ICU_GROUPBE0(void){ __asm volatile( "brk"); }; //;0x01AC Reserved //;0x01B0 Reserved @@ -325,437 +325,437 @@ void INT_Excep_ICU_GROUPBE0(void){ }; //;0x01B4 Reserved //;0x01B8 GROUPBL0 -void INT_Excep_ICU_GROUPBL0(void){ }; +void INT_Excep_ICU_GROUPBL0(void){ __asm volatile( "brk"); }; //;0x01BC GROUPBL1 -void INT_Excep_ICU_GROUPBL1(void){ }; +void INT_Excep_ICU_GROUPBL1(void){ __asm volatile( "brk"); }; //;0x01C0 GROUPAL0 -void INT_Excep_ICU_GROUPAL0(void){ }; +void INT_Excep_ICU_GROUPAL0(void){ __asm volatile( "brk"); }; //;0x01C4 GROUPAL1 -void INT_Excep_ICU_GROUPAL1(void){ }; +void INT_Excep_ICU_GROUPAL1(void){ __asm volatile( "brk"); }; //;0x01C8 RXIF11 -void INT_Excep_SCIF11_RXIF11(void){ }; +void INT_Excep_SCIF11_RXIF11(void){ __asm volatile( "brk"); }; //;0x01CC TXIF11 -void INT_Excep_SCIF11_TXIF11(void){ }; +void INT_Excep_SCIF11_TXIF11(void){ __asm volatile( "brk"); }; //;0x01D0 RXIF12 -void INT_Excep_SCIF12_RXIF12(void){ }; +void INT_Excep_SCIF12_RXIF12(void){ __asm volatile( "brk"); }; //;0x01D4 TXIF12 -void INT_Excep_SCIF12_TXIF12(void){ }; +void INT_Excep_SCIF12_TXIF12(void){ __asm volatile( "brk"); }; //;0x01D8 Reserved //;0x01DC Reserved //;0x01E0 DMAC0I -void INT_Excep_DMAC_DMAC0I(void){ }; +void INT_Excep_DMAC_DMAC0I(void){ __asm volatile( "brk"); }; //;0x01E4 DMAC1I -void INT_Excep_DMAC_DMAC1I(void){ }; +void INT_Excep_DMAC_DMAC1I(void){ __asm volatile( "brk"); }; //;0x01E8 DMAC2I -void INT_Excep_DMAC_DMAC2I(void){ }; +void INT_Excep_DMAC_DMAC2I(void){ __asm volatile( "brk"); }; //;0x01EC DMAC3I -void INT_Excep_DMAC_DMAC3I(void){ }; +void INT_Excep_DMAC_DMAC3I(void){ __asm volatile( "brk"); }; //;0x01F0 DMAC74I -void INT_Excep_DMAC_DMAC74I(void){ }; +void INT_Excep_DMAC_DMAC74I(void){ __asm volatile( "brk"); }; //;0x01F4 OST -void INT_Excep_ICU_OST(void){ }; +void INT_Excep_ICU_OST(void){ __asm volatile( "brk"); }; //;0x01F8 EXDMAC0I -void INT_Excep_EXDMAC_EXDMAC0I(void){ }; +void INT_Excep_EXDMAC_EXDMAC0I(void){ __asm volatile( "brk"); }; //;0x01FC EXDMAC1I -void INT_Excep_EXDMAC_EXDMAC1I(void){ }; +void INT_Excep_EXDMAC_EXDMAC1I(void){ __asm volatile( "brk"); }; //;0x0200 INTB128 -void INT_Excep_PERIB_INTB128(void){ }; +void INT_Excep_PERIB_INTB128(void){ __asm volatile( "brk"); }; //;0x0204 INTB129 -void INT_Excep_PERIB_INTB129(void){ }; +void INT_Excep_PERIB_INTB129(void){ __asm volatile( "brk"); }; //;0x0208 INTB130 -void INT_Excep_PERIB_INTB130(void){ }; +void INT_Excep_PERIB_INTB130(void){ __asm volatile( "brk"); }; //;0x020C INTB131 -void INT_Excep_PERIB_INTB131(void){ }; +void INT_Excep_PERIB_INTB131(void){ __asm volatile( "brk"); }; //;0x0210 INTB132 -void INT_Excep_PERIB_INTB132(void){ }; +void INT_Excep_PERIB_INTB132(void){ __asm volatile( "brk"); }; //;0x0214 INTB133 -void INT_Excep_PERIB_INTB133(void){ }; +void INT_Excep_PERIB_INTB133(void){ __asm volatile( "brk"); }; //;0x0218 INTB134 -void INT_Excep_PERIB_INTB134(void){ }; +void INT_Excep_PERIB_INTB134(void){ __asm volatile( "brk"); }; //;0x021C INTB135 -void INT_Excep_PERIB_INTB135(void){ }; +void INT_Excep_PERIB_INTB135(void){ __asm volatile( "brk"); }; //;0x0220 INTB136 -void INT_Excep_PERIB_INTB136(void){ }; +void INT_Excep_PERIB_INTB136(void){ __asm volatile( "brk"); }; //;0x0224 INTB137 -void INT_Excep_PERIB_INTB137(void){ }; +void INT_Excep_PERIB_INTB137(void){ __asm volatile( "brk"); }; //;0x0228 INTB138 -void INT_Excep_PERIB_INTB138(void){ }; +void INT_Excep_PERIB_INTB138(void){ __asm volatile( "brk"); }; //;0x022C INTB139 -void INT_Excep_PERIB_INTB139(void){ }; +void INT_Excep_PERIB_INTB139(void){ __asm volatile( "brk"); }; //;0x0230 INTB140 -void INT_Excep_PERIB_INTB140(void){ }; +void INT_Excep_PERIB_INTB140(void){ __asm volatile( "brk"); }; //;0x0234 INTB141 -void INT_Excep_PERIB_INTB141(void){ }; +void INT_Excep_PERIB_INTB141(void){ __asm volatile( "brk"); }; //;0x0238 INTB142 -void INT_Excep_PERIB_INTB142(void){ }; +void INT_Excep_PERIB_INTB142(void){ __asm volatile( "brk"); }; //;0x023C INTB143 -void INT_Excep_PERIB_INTB143(void){ }; +void INT_Excep_PERIB_INTB143(void){ __asm volatile( "brk"); }; //;0x0240 INTB144 -void INT_Excep_PERIB_INTB144(void){ }; +void INT_Excep_PERIB_INTB144(void){ __asm volatile( "brk"); }; //;0x0244 INTB145 -void INT_Excep_PERIB_INTB145(void){ }; +void INT_Excep_PERIB_INTB145(void){ __asm volatile( "brk"); }; //;0x0248 INTB146 -void INT_Excep_PERIB_INTB146(void){ }; +void INT_Excep_PERIB_INTB146(void){ __asm volatile( "brk"); }; //;0x024C INTB147 -void INT_Excep_PERIB_INTB147(void){ }; +void INT_Excep_PERIB_INTB147(void){ __asm volatile( "brk"); }; //;0x0250 INTB148 -void INT_Excep_PERIB_INTB148(void){ }; +void INT_Excep_PERIB_INTB148(void){ __asm volatile( "brk"); }; //;0x02540 INTB149 -void INT_Excep_PERIB_INTB149(void){ }; +void INT_Excep_PERIB_INTB149(void){ __asm volatile( "brk"); }; //;0x0258 INTB150 -void INT_Excep_PERIB_INTB150(void){ }; +void INT_Excep_PERIB_INTB150(void){ __asm volatile( "brk"); }; //;0x025C INTB151 -void INT_Excep_PERIB_INTB151(void){ }; +void INT_Excep_PERIB_INTB151(void){ __asm volatile( "brk"); }; //;0x0260 INTB152 -void INT_Excep_PERIB_INTB152(void){ }; +void INT_Excep_PERIB_INTB152(void){ __asm volatile( "brk"); }; //;0x0264 INTB153 -void INT_Excep_PERIB_INTB153(void){ }; +void INT_Excep_PERIB_INTB153(void){ __asm volatile( "brk"); }; //;0x0268 INTB154 -void INT_Excep_PERIB_INTB154(void){ }; +void INT_Excep_PERIB_INTB154(void){ __asm volatile( "brk"); }; //;0x026C INTB155 -void INT_Excep_PERIB_INTB155(void){ }; +void INT_Excep_PERIB_INTB155(void){ __asm volatile( "brk"); }; //;0x0270 INTB156 -void INT_Excep_PERIB_INTB156(void){ }; +void INT_Excep_PERIB_INTB156(void){ __asm volatile( "brk"); }; //;0x0274 INTB157 -void INT_Excep_PERIB_INTB157(void){ }; +void INT_Excep_PERIB_INTB157(void){ __asm volatile( "brk"); }; //;0x0278 INTB158 -void INT_Excep_PERIB_INTB158(void){ }; +void INT_Excep_PERIB_INTB158(void){ __asm volatile( "brk"); }; //;0x027C INTB159 -void INT_Excep_PERIB_INTB159(void){ }; +void INT_Excep_PERIB_INTB159(void){ __asm volatile( "brk"); }; //;0x0280 INTB160 -void INT_Excep_PERIB_INTB160(void){ }; +void INT_Excep_PERIB_INTB160(void){ __asm volatile( "brk"); }; //;0x0284 INTB161 -void INT_Excep_PERIB_INTB161(void){ }; +void INT_Excep_PERIB_INTB161(void){ __asm volatile( "brk"); }; //;0x0288 INTB162 -void INT_Excep_PERIB_INTB162(void){ }; +void INT_Excep_PERIB_INTB162(void){ __asm volatile( "brk"); }; //;0x028C INTB163 -void INT_Excep_PERIB_INTB163(void){ }; +void INT_Excep_PERIB_INTB163(void){ __asm volatile( "brk"); }; //;0x0290 INTB164 -void INT_Excep_PERIB_INTB164(void){ }; +void INT_Excep_PERIB_INTB164(void){ __asm volatile( "brk"); }; //;0x0294 PERIB INTB165 -void INT_Excep_PERIB_INTB165(void){ }; +void INT_Excep_PERIB_INTB165(void){ __asm volatile( "brk"); }; //;0x0298 PERIB INTB166 -void INT_Excep_PERIB_INTB166(void){ }; +void INT_Excep_PERIB_INTB166(void){ __asm volatile( "brk"); }; //;0x029C PERIB INTB167 -void INT_Excep_PERIB_INTB167(void){ }; +void INT_Excep_PERIB_INTB167(void){ __asm volatile( "brk"); }; //;0x02A0 PERIB INTB168 -void INT_Excep_PERIB_INTB168(void){ }; +void INT_Excep_PERIB_INTB168(void){ __asm volatile( "brk"); }; //;0x02A4 PERIB INTB169 -void INT_Excep_PERIB_INTB169(void){ }; +void INT_Excep_PERIB_INTB169(void){ __asm volatile( "brk"); }; //;0x02A8 PERIB INTB170 -void INT_Excep_PERIB_INTB170(void){ }; +void INT_Excep_PERIB_INTB170(void){ __asm volatile( "brk"); }; //;0x02AC PERIB INTB171 -void INT_Excep_PERIB_INTB171(void){ }; +void INT_Excep_PERIB_INTB171(void){ __asm volatile( "brk"); }; //;0x02B0 PERIB INTB172 -void INT_Excep_PERIB_INTB172(void){ }; +void INT_Excep_PERIB_INTB172(void){ __asm volatile( "brk"); }; //;0x02B4 PERIB INTB173 -void INT_Excep_PERIB_INTB173(void){ }; +void INT_Excep_PERIB_INTB173(void){ __asm volatile( "brk"); }; //;0x02B8 PERIB INTB174 -void INT_Excep_PERIB_INTB174(void){ }; +void INT_Excep_PERIB_INTB174(void){ __asm volatile( "brk"); }; //;0x02BC PERIB INTB175 -void INT_Excep_PERIB_INTB175(void){ }; +void INT_Excep_PERIB_INTB175(void){ __asm volatile( "brk"); }; //;0x02C0 PERIB INTB176 -void INT_Excep_PERIB_INTB176(void){ }; +void INT_Excep_PERIB_INTB176(void){ __asm volatile( "brk"); }; //;0x02C4 PERIB INTB177 -void INT_Excep_PERIB_INTB177(void){ }; +void INT_Excep_PERIB_INTB177(void){ __asm volatile( "brk"); }; //;0x02C8 PERIB INTB178 -void INT_Excep_PERIB_INTB178(void){ }; +void INT_Excep_PERIB_INTB178(void){ __asm volatile( "brk"); }; //;0x02CC PERIB INTB179 -void INT_Excep_PERIB_INTB179(void){ }; +void INT_Excep_PERIB_INTB179(void){ __asm volatile( "brk"); }; //;0x02D0 PERIB INTB180 -void INT_Excep_PERIB_INTB180(void){ }; +void INT_Excep_PERIB_INTB180(void){ __asm volatile( "brk"); }; //;0x02D4 PERIB INTB181 -void INT_Excep_PERIB_INTB181(void){ }; +void INT_Excep_PERIB_INTB181(void){ __asm volatile( "brk"); }; //;0x02D8 PERIB INTB182 -void INT_Excep_PERIB_INTB182(void){ }; +void INT_Excep_PERIB_INTB182(void){ __asm volatile( "brk"); }; //;0x02DC PERIB INTB183 -void INT_Excep_PERIB_INTB183(void){ }; +void INT_Excep_PERIB_INTB183(void){ __asm volatile( "brk"); }; //;0x02E0 PERIB INTB184 -void INT_Excep_PERIB_INTB184(void){ }; +void INT_Excep_PERIB_INTB184(void){ __asm volatile( "brk"); }; //;0x02E4 PERIB INTB185 -void INT_Excep_PERIB_INTB185(void){ }; +void INT_Excep_PERIB_INTB185(void){ __asm volatile( "brk"); }; //;0x02E8 PERIB INTB186 -void INT_Excep_PERIB_INTB186(void){ }; +void INT_Excep_PERIB_INTB186(void){ __asm volatile( "brk"); }; //;0x02EC PERIB INTB187 -void INT_Excep_PERIB_INTB187(void){ }; +void INT_Excep_PERIB_INTB187(void){ __asm volatile( "brk"); }; //;0x02F0 PERIB INTB188 -void INT_Excep_PERIB_INTB188(void){ }; +void INT_Excep_PERIB_INTB188(void){ __asm volatile( "brk"); }; //;0x02F4 PERIB INTB189 -void INT_Excep_PERIB_INTB189(void){ }; +void INT_Excep_PERIB_INTB189(void){ __asm volatile( "brk"); }; //;0x02F8 PERIB INTB190 -void INT_Excep_PERIB_INTB190(void){ }; +void INT_Excep_PERIB_INTB190(void){ __asm volatile( "brk"); }; //;0x02FC PERIB INTB191 -void INT_Excep_PERIB_INTB191(void){ }; +void INT_Excep_PERIB_INTB191(void){ __asm volatile( "brk"); }; //;0x0300 PERIB INTB192 -void INT_Excep_PERIB_INTB192(void){ }; +void INT_Excep_PERIB_INTB192(void){ __asm volatile( "brk"); }; //;0x0304 PERIB INTB193 -void INT_Excep_PERIB_INTB193(void){ }; +void INT_Excep_PERIB_INTB193(void){ __asm volatile( "brk"); }; //;0x0308 PERIB INTB194 -void INT_Excep_PERIB_INTB194(void){ }; +void INT_Excep_PERIB_INTB194(void){ __asm volatile( "brk"); }; //;0x030C PERIB INTB195 -void INT_Excep_PERIB_INTB195(void){ }; +void INT_Excep_PERIB_INTB195(void){ __asm volatile( "brk"); }; //;0x0310 PERIB INTB196 -void INT_Excep_PERIB_INTB196(void){ }; +void INT_Excep_PERIB_INTB196(void){ __asm volatile( "brk"); }; //;0x0314 PERIB INTB197 -void INT_Excep_PERIB_INTB197(void){ }; +void INT_Excep_PERIB_INTB197(void){ __asm volatile( "brk"); }; //;0x0318 PERIB INTB198 -void INT_Excep_PERIB_INTB198(void){ }; +void INT_Excep_PERIB_INTB198(void){ __asm volatile( "brk"); }; //;0x031C PERIB INTB199 -void INT_Excep_PERIB_INTB199(void){ }; +void INT_Excep_PERIB_INTB199(void){ __asm volatile( "brk"); }; //;0x0320 PERIB INTB200 -void INT_Excep_PERIB_INTB200(void){ }; +void INT_Excep_PERIB_INTB200(void){ __asm volatile( "brk"); }; //;0x0324 PERIB INTB201 -void INT_Excep_PERIB_INTB201(void){ }; +void INT_Excep_PERIB_INTB201(void){ __asm volatile( "brk"); }; //;0x0328 PERIB INTB202 -void INT_Excep_PERIB_INTB202(void){ }; +void INT_Excep_PERIB_INTB202(void){ __asm volatile( "brk"); }; //;0x032C PERIB INTB203 -void INT_Excep_PERIB_INTB203(void){ }; +void INT_Excep_PERIB_INTB203(void){ __asm volatile( "brk"); }; //;0x0320 PERIB INTB204 -void INT_Excep_PERIB_INTB204(void){ }; +void INT_Excep_PERIB_INTB204(void){ __asm volatile( "brk"); }; //;0x0334 PERIB INTB205 -void INT_Excep_PERIB_INTB205(void){ }; +void INT_Excep_PERIB_INTB205(void){ __asm volatile( "brk"); }; //;0x0338 PERIB INTB206 -void INT_Excep_PERIB_INTB206(void){ }; +void INT_Excep_PERIB_INTB206(void){ __asm volatile( "brk"); }; //;0x033C PERIB INTB207 -void INT_Excep_PERIB_INTB207(void){ }; +void INT_Excep_PERIB_INTB207(void){ __asm volatile( "brk"); }; //;0x0340 PERIA INTA208 -void INT_Excep_PERIA_INTA208(void){ }; +void INT_Excep_PERIA_INTA208(void){ __asm volatile( "brk"); }; //;0x0344 PERIA INTA209 -void INT_Excep_PERIA_INTA209(void){ }; +void INT_Excep_PERIA_INTA209(void){ __asm volatile( "brk"); }; //;0x0348 PERIA INTA210 -void INT_Excep_PERIA_INTA210(void){ }; +void INT_Excep_PERIA_INTA210(void){ __asm volatile( "brk"); }; //;0x034C PERIA INTA211 -void INT_Excep_PERIA_INTA211(void){ }; +void INT_Excep_PERIA_INTA211(void){ __asm volatile( "brk"); }; //;0x0350 PERIA INTA212 -void INT_Excep_PERIA_INTA212(void){ }; +void INT_Excep_PERIA_INTA212(void){ __asm volatile( "brk"); }; //;0x0354 PERIA INTA213 -void INT_Excep_PERIA_INTA213(void){ }; +void INT_Excep_PERIA_INTA213(void){ __asm volatile( "brk"); }; //;0x0358 PERIA INTA214 -void INT_Excep_PERIA_INTA214(void){ }; +void INT_Excep_PERIA_INTA214(void){ __asm volatile( "brk"); }; //;0x035C PERIA INTA215 -void INT_Excep_PERIA_INTA215(void){ }; +void INT_Excep_PERIA_INTA215(void){ __asm volatile( "brk"); }; //;0x0360 PERIA INTA216 -void INT_Excep_PERIA_INTA216(void){ }; +void INT_Excep_PERIA_INTA216(void){ __asm volatile( "brk"); }; //;0x0364 PERIA INTA217 -void INT_Excep_PERIA_INTA217(void){ }; +void INT_Excep_PERIA_INTA217(void){ __asm volatile( "brk"); }; //;0x0368 PERIA INTA218 -void INT_Excep_PERIA_INTA218(void){ }; +void INT_Excep_PERIA_INTA218(void){ __asm volatile( "brk"); }; //;0x036C PERIA INTA219 -void INT_Excep_PERIA_INTA219(void){ }; +void INT_Excep_PERIA_INTA219(void){ __asm volatile( "brk"); }; //;0x0370 PERIA INTA220 -void INT_Excep_PERIA_INTA220(void){ }; +void INT_Excep_PERIA_INTA220(void){ __asm volatile( "brk"); }; //;0x0374 PERIA INTA221 -void INT_Excep_PERIA_INTA221(void){ }; +void INT_Excep_PERIA_INTA221(void){ __asm volatile( "brk"); }; //;0x0378 PERIA INTA222 -void INT_Excep_PERIA_INTA222(void){ }; +void INT_Excep_PERIA_INTA222(void){ __asm volatile( "brk"); }; //;0x037C PERIA INTA223 -void INT_Excep_PERIA_INTA223(void){ }; +void INT_Excep_PERIA_INTA223(void){ __asm volatile( "brk"); }; //;0x0380 PERIA INTA224 -void INT_Excep_PERIA_INTA224(void){ }; +void INT_Excep_PERIA_INTA224(void){ __asm volatile( "brk"); }; //;0x0384 PERIA INTA225 -void INT_Excep_PERIA_INTA225(void){ }; +void INT_Excep_PERIA_INTA225(void){ __asm volatile( "brk"); }; //;0x0388 PERIA INTA226 -void INT_Excep_PERIA_INTA226(void){ }; +void INT_Excep_PERIA_INTA226(void){ __asm volatile( "brk"); }; //;0x038C PERIA INTA227 -void INT_Excep_PERIA_INTA227(void){ }; +void INT_Excep_PERIA_INTA227(void){ __asm volatile( "brk"); }; //;0x0390 PERIA INTA228 -void INT_Excep_PERIA_INTA228(void){ }; +void INT_Excep_PERIA_INTA228(void){ __asm volatile( "brk"); }; //;0x0394 PERIA INTA229 -void INT_Excep_PERIA_INTA229(void){ }; +void INT_Excep_PERIA_INTA229(void){ __asm volatile( "brk"); }; //;0x0398 PERIA INTA230 -void INT_Excep_PERIA_INTA230(void){ }; +void INT_Excep_PERIA_INTA230(void){ __asm volatile( "brk"); }; //;0x039C PERIA INTA231 -void INT_Excep_PERIA_INTA231(void){ }; +void INT_Excep_PERIA_INTA231(void){ __asm volatile( "brk"); }; //;0x03A0 PERIA INTA232 -void INT_Excep_PERIA_INTA232(void){ }; +void INT_Excep_PERIA_INTA232(void){ __asm volatile( "brk"); }; //;0x03A4 PERIA INTA233 -void INT_Excep_PERIA_INTA233(void){ }; +void INT_Excep_PERIA_INTA233(void){ __asm volatile( "brk"); }; //;0x03A8 PERIA INTA234 -void INT_Excep_PERIA_INTA234(void){ }; +void INT_Excep_PERIA_INTA234(void){ __asm volatile( "brk"); }; //;0x03AC PERIA INTA235 -void INT_Excep_PERIA_INTA235(void){ }; +void INT_Excep_PERIA_INTA235(void){ __asm volatile( "brk"); }; //;0x03B0 PERIA INTA236 -void INT_Excep_PERIA_INTA236(void){ }; +void INT_Excep_PERIA_INTA236(void){ __asm volatile( "brk"); }; //;0x04B4 PERIA INTA237 -void INT_Excep_PERIA_INTA237(void){ }; +void INT_Excep_PERIA_INTA237(void){ __asm volatile( "brk"); }; //;0x03B8 PERIA INTA238 -void INT_Excep_PERIA_INTA238(void){ }; +void INT_Excep_PERIA_INTA238(void){ __asm volatile( "brk"); }; //;0x03BC PERIA INTA239 -void INT_Excep_PERIA_INTA239(void){ }; +void INT_Excep_PERIA_INTA239(void){ __asm volatile( "brk"); }; //;0x03C0 PERIA INTA240 -void INT_Excep_PERIA_INTA240(void){ }; +void INT_Excep_PERIA_INTA240(void){ __asm volatile( "brk"); }; //;0x03C4 PERIA INTA241 -void INT_Excep_PERIA_INTA241(void){ }; +void INT_Excep_PERIA_INTA241(void){ __asm volatile( "brk"); }; //;0x03C8 PERIA INTA242 -void INT_Excep_PERIA_INTA242(void){ }; +void INT_Excep_PERIA_INTA242(void){ __asm volatile( "brk"); }; //;0x03CC PERIA INTA243 -void INT_Excep_PERIA_INTA243(void){ }; +void INT_Excep_PERIA_INTA243(void){ __asm volatile( "brk"); }; //;0x03D0 PERIA INTA244 -void INT_Excep_PERIA_INTA244(void){ }; +void INT_Excep_PERIA_INTA244(void){ __asm volatile( "brk"); }; //;0x03D4 PERIA INTA245 -void INT_Excep_PERIA_INTA245(void){ }; +void INT_Excep_PERIA_INTA245(void){ __asm volatile( "brk"); }; //;0x03D8 PERIA INTA246 -void INT_Excep_PERIA_INTA246(void){ }; +void INT_Excep_PERIA_INTA246(void){ __asm volatile( "brk"); }; //;0x03DC PERIA INTA247 -void INT_Excep_PERIA_INTA247(void){ }; +void INT_Excep_PERIA_INTA247(void){ __asm volatile( "brk"); }; //;0x03E0 PERIA INTA248 -void INT_Excep_PERIA_INTA248(void){ }; +void INT_Excep_PERIA_INTA248(void){ __asm volatile( "brk"); }; //;0x03E4 PERIA INTA249 -void INT_Excep_PERIA_INTA249(void){ }; +void INT_Excep_PERIA_INTA249(void){ __asm volatile( "brk"); }; //;0x03E8 PERIA INTA250 -void INT_Excep_PERIA_INTA250(void){ }; +void INT_Excep_PERIA_INTA250(void){ __asm volatile( "brk"); }; //;0x03EC PERIA INTA251 -void INT_Excep_PERIA_INTA251(void){ }; +void INT_Excep_PERIA_INTA251(void){ __asm volatile( "brk"); }; //;0x03F0 PERIA INTA252 -void INT_Excep_PERIA_INTA252(void){ }; +void INT_Excep_PERIA_INTA252(void){ __asm volatile( "brk"); }; //;0x03F4 PERIA INTA253 -void INT_Excep_PERIA_INTA253(void){ }; +void INT_Excep_PERIA_INTA253(void){ __asm volatile( "brk"); }; //;0x03F8 PERIA INTA254 -void INT_Excep_PERIA_INTA254(void){ }; +void INT_Excep_PERIA_INTA254(void){ __asm volatile( "brk"); }; //;0x03FC PERIA INTA255 -void INT_Excep_PERIA_INTA255(void){ }; +void INT_Excep_PERIA_INTA255(void){ __asm volatile( "brk"); }; diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/reset_program.asm b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/reset_program.asm index ef2a6a929..9b0fef799 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/reset_program.asm +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/reset_program.asm @@ -71,7 +71,7 @@ _PowerON_Reset : /* change PSW PM to user-mode */ MVFC PSW,R1 - OR #00100000h,R1 +/* DON'T CHANGE TO USER MODE OR #00100000h,R1 */ PUSH.L R1 MVFC PC,R1 ADD #10,R1 diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/rskrx64mdef.h b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/rskrx64mdef.h new file mode 100644 index 000000000..3bd0ed276 --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/rskrx64mdef.h @@ -0,0 +1,80 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +*******************************************************************************/ +/******************************************************************************* +* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved. */ +/******************************************************************************* +* File Name : rskrx64mdef.h +* Version : 1.00 +* Device : R5F564ML +* Tool-Chain : Renesas RX Standard 2.01.0 +* H/W Platform : RSK+RX64M +* Description : Defines macros relating to the RX64M user LEDs and switches +*******************************************************************************/ +/******************************************************************************* +* History : 20 Mar. 2014 Ver. 0.00 Alpha Release +*******************************************************************************/ + +/******************************************************************************* +* Macro Definitions +*******************************************************************************/ +/* Multiple inclusion prevention macro */ +#ifndef RSKRX64MDEF_H +#define RSKRX64MDEF_H + +/******************************************************************************* +* User Includes (Project Level Includes) +*******************************************************************************/ + +/* General Values */ +#define LED_ON (0) +#define LED_OFF (1) +#define SET_BIT_HIGH (1) +#define SET_BIT_LOW (0) +#define SET_BYTE_HIGH (0xFF) +#define SET_BYTE_LOW (0x00) +#define OUTPUT_PIN (1) +#define INPUT_PIN (0) + +/* Switch port pins data direction */ +#define SW1_PIN_DIR (PORT1.PDR.BIT.B5) +#define SW2_PIN_DIR (PORT1.PDR.BIT.B2) +#define SW3_PIN_DIR (PORT0.PDR.BIT.B7) + +/* Switches */ +#define SW1 (PORT1.PIDR.BIT.B5) +#define SW2 (PORT1.PIDR.BIT.B2) +#define SW3 (PORT0.PIDR.BIT.B7) + +/* LED data direction */ +#define LED0_PIN_DIR (PORT0.PDR.BIT.B3) +#define LED1_PIN_DIR (PORT0.PDR.BIT.B5) +#define LED2_PIN_DIR (PORT2.PDR.BIT.B6) +#define LED3_PIN_DIR (PORT2.PDR.BIT.B7) + +/* LED ouptut pin settings */ +#define LED0 (PORT0.PODR.BIT.B3) +#define LED1 (PORT0.PODR.BIT.B5) +#define LED2 (PORT2.PODR.BIT.B6) +#define LED3 (PORT2.PODR.BIT.B7) + +/* End of multiple inclusion prevention macro */ +#endif diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/vector_table.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/vector_table.c index 94fb38ccd..f1d75aac4 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/vector_table.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RenesasCode/vector_table.c @@ -20,7 +20,11 @@ typedef void (*fp) (void); extern void PowerON_Reset (void); -extern void stack (void); +extern void stack (void); +extern void vTickISR( void ); +extern void vSoftwareInterruptISR( void ); +extern void vIntQTimerISR0( void ); +extern void vIntQTimerISR1( void ); #define FVECT_SECT __attribute__ ((section (".fvectors"))) @@ -98,65 +102,65 @@ const void *HardwareVectors[] FVECT_SECT = { const fp RelocatableVectors[] RVECT_SECT = { //;0x0000 Reserved - + (fp)0, //;0x0004 Reserved - + (fp)0, //;0x0008 Reserved - + (fp)0, //;0x000C Reserved - + (fp)0, //;0x0010 Reserved - + (fp)0, //;0x0014 Reserved - + (fp)0, //;0x0018 Reserved - + (fp)0, //;0x001C Reserved - + (fp)0, //;0x0020 Reserved - + (fp)0, //;0x0024 Reserved - + (fp)0, //;0x0028 Reserved - + (fp)0, //;0x002C Reserved - + (fp)0, //;0x0030 Reserved - + (fp)0, //;0x0034 Reserved - + (fp)0, //;0x0038 Reserved - + (fp)0, //;0x003C Reserved - + (fp)0, //;0x0040 BUSERR (fp)INT_Excep_BSC_BUSERR, //;0x0044 Reserved - + (fp)0, //;0x0048 RAMERR (fp)INT_Excep_RAM_RAMERR, //;0x004C Reserved - + (fp)0, //;0x0050 Reserved - + (fp)0, //;0x0054 FIFERR (fp)INT_Excep_FCU_FIFERR, //;0x0058 Reserved - + (fp)0, //;0x005C FRDYI (fp)INT_Excep_FCU_FRDYI, //;0x0060 Reserved - + (fp)0, //;0x0064 Reserved - + (fp)0, //;0x0068 SWINT2 (fp)INT_Excep_ICU_SWINT2, //;0x006C SWINT - (fp)INT_Excep_ICU_SWINT, + (fp)vSoftwareInterruptISR, //;0x0070 CMI0 - (fp)INT_Excep_CMT0_CMI0, + (fp)vTickISR, //;0x0074 CMI1 (fp)INT_Excep_CMT1_CMI1, @@ -179,18 +183,18 @@ const fp RelocatableVectors[] RVECT_SECT = { //;0x008C D1FIFO0 (fp)INT_Excep_USB0_D1FIFO0, //;0x0090 Reserved - + (fp)0, //;0x0094 Reserved - + (fp)0, //;0x0098 SPRI0 (fp)INT_Excep_RSPI0_SPRI0, //;0x009C SPTI0 (fp)INT_Excep_RSPI0_SPTI0, //;0x00A0 Reserved - + (fp)0, //;0x00A4 Reserved - + (fp)0, //;0x00A8 SPRI (fp)INT_Excep_QSPI_SPRI, @@ -212,7 +216,7 @@ const fp RelocatableVectors[] RVECT_SECT = { //;0x00C0 SSIRTI1 (fp)INT_Excep_SSI1_SSIRTI1, //;0x00C4 Reserved - + (fp)0, //;0x00C8 IDEI (fp)INT_Excep_SRC_IDEI, @@ -231,9 +235,9 @@ const fp RelocatableVectors[] RVECT_SECT = { //;0x00DC TXI2 (fp)INT_Excep_RIIC2_TXI2, //;0x00E0 Reserved - + (fp)0, //;0x00E4 Reserved - + (fp)0, //;0x00E8 RXI0 (fp)INT_Excep_SCI0_RXI0, @@ -333,7 +337,7 @@ const fp RelocatableVectors[] RVECT_SECT = { //;0x0168 USBR0 (fp)INT_Excep_USB_USBR0, //;0x016C Reserved - + (fp)0, //;0x0170 ALM (fp)INT_Excep_RTC_ALM, @@ -379,11 +383,11 @@ const fp RelocatableVectors[] RVECT_SECT = { //;0x01A8 GROUPBE0 (fp)INT_Excep_ICU_GROUPBE0, //;0x01AC Reserved - + (fp)0, //;0x01B0 Reserved - + (fp)0, //;0x01B4 Reserved - + (fp)0, //;0x01B8 GROUPBL0 (fp)INT_Excep_ICU_GROUPBL0, @@ -409,9 +413,9 @@ const fp RelocatableVectors[] RVECT_SECT = { (fp)INT_Excep_SCIF12_TXIF12, //;0x01D8 Reserved - + (fp)0, //;0x01DC Reserved - + (fp)0, //;0x01E0 DMAC0I (fp)INT_Excep_DMAC_DMAC0I, @@ -437,10 +441,10 @@ const fp RelocatableVectors[] RVECT_SECT = { (fp)INT_Excep_EXDMAC_EXDMAC1I, //;0x0200 INTB128 - (fp)INT_Excep_PERIB_INTB128, + (fp)vIntQTimerISR0, //;0x0204 INTB129 - (fp)INT_Excep_PERIB_INTB129, + (fp)vIntQTimerISR1, //;0x0208 INTB130 (fp)INT_Excep_PERIB_INTB130, diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c index db8a490fd..3746b8dcd 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c @@ -91,9 +91,6 @@ #include "QueueOverwrite.h" #include "EventGroupsDemo.h" -/* Renesas includes. */ -#include "iodefine.h" - /* Set option bytes */ #pragma address OFS0_location = 0xFFFFFF8CUL #pragma address OFS1_location = 0xFFFFFF88UL @@ -163,6 +160,9 @@ int main( void ) static void prvSetupHardware( void ) { + /* Set up the ports used by the LED outputs (the name ParTest is now + obsolete - it originally came from "parallel port test"). */ + vParTestInitialise(); } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c new file mode 100644 index 000000000..2dc3d8aaf --- /dev/null +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c @@ -0,0 +1,469 @@ +/* + FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that has become a de facto standard. * + * * + * Help yourself get started quickly and support the FreeRTOS * + * project by purchasing a FreeRTOS tutorial book, reference * + * manual, or both from: http://www.FreeRTOS.org/Documentation * + * * + * Thank you! * + * * + *************************************************************************** + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. + + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available from the following + link: http://www.freertos.org/a00114.html + + 1 tab == 4 spaces! + + *************************************************************************** + * * + * Having a problem? Start by reading the FAQ "My application does * + * not run, what could be wrong?" * + * * + * http://www.FreeRTOS.org/FAQHelp.html * + * * + *************************************************************************** + + http://www.FreeRTOS.org - Documentation, books, training, latest versions, + license and Real Time Engineers Ltd. contact details. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +/****************************************************************************** + * NOTE 1: This project provides two demo applications. A simple blinky style + * project, and a more comprehensive test and demo application. The + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select + * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY + * in main.c. This file implements the comprehensive test and demo version. + * + * NOTE 2: This file only contains the source code that is specific to the + * full demo. Generic functions, such FreeRTOS hook functions, and functions + * required to configure the hardware, are defined in main.c. + * + ****************************************************************************** + * + * main_full() creates all the demo application tasks and software timers, then + * starts the scheduler. The web documentation provides more details of the + * standard demo application tasks, which provide no particular functionality, + * but do provide a good example of how to use the FreeRTOS API. + * + * In addition to the standard demo tasks, the following tasks and tests are + * defined and/or created within this file: + * + * "Reg test" tasks - These fill the core registers with known values, then + * check that each register maintains its expected value for the lifetime of the + * task. Each task uses a different set of values. The reg test tasks execute + * with a very low priority, so get preempted very frequently. A register + * containing an unexpected value is indicative of an error in the context + * switching mechanism. + * + * "Check" task - The check task period is initially set to three seconds. The + * task checks that all the standard demo tasks, and the register check tasks, + * are not only still executing, but are executing without reporting any errors. + * If the check task discovers that a task has either stalled, or reported an + * error, then it changes its own execution period from the initial three + * seconds, to just 200ms. The check task also toggles an LED each time it is + * called. This provides a visual indication of the system status: If the LED + * toggles every three seconds, then no issues have been discovered. If the LED + * toggles every 200ms, then an issue has been discovered with at least one + * task. + */ + +/* Standard includes. */ +#include + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" +#include "semphr.h" + +/* Standard demo application includes. */ +#include "flop.h" +#include "semtest.h" +#include "dynamic.h" +#include "BlockQ.h" +#include "blocktim.h" +#include "countsem.h" +#include "GenQTest.h" +#include "recmutex.h" +#include "death.h" +#include "partest.h" +#include "comtest2.h" +#include "serial.h" +#include "TimerDemo.h" +#include "QueueOverwrite.h" +#include "IntQueue.h" +#include "EventGroupsDemo.h" +#include "flash.h" + +/* Priorities for the demo application tasks. */ +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL ) +#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL ) +#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY ) +#define mainFLASH_PRIORITY ( tskIDLE_PRIORITY ) + +/* The priority used by the UART command console task. */ +#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) + +/* The LED used by the check timer. */ +#define mainCHECK_LED ( 3 ) + +/* A block time of zero simply means "don't block". */ +#define mainDONT_BLOCK ( 0UL ) + +/* The period after which the check timer will expire, in ms, provided no errors +have been reported by any of the standard demo tasks. ms are converted to the +equivalent in ticks using the portTICK_PERIOD_MS constant. */ +#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS ) + +/* The period at which the check timer will expire, in ms, if an error has been +reported in one of the standard demo tasks. ms are converted to the equivalent +in ticks using the portTICK_PERIOD_MS constant. */ +#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS ) + +/* Parameters that are passed into the register check tasks solely for the +purpose of ensuring parameters are passed into tasks correctly. */ +#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 ) +#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 ) + +/* The base period used by the timer test tasks. */ +#define mainTIMER_TEST_PERIOD ( 50 ) + +/*-----------------------------------------------------------*/ + +/* + * Called by main() to run the full demo (as opposed to the blinky demo) when + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. + */ +void main_full( void ); + +/* + * The check task, as described at the top of this file. + */ +static void prvCheckTask( void *pvParameters ); + +/* + * Register check tasks, and the tasks used to write over and check the contents + * of the FPU registers, as described at the top of this file. The nature of + * these files necessitates that they are written in an assembly file, but the + * entry points are kept in the C file for the convenience of checking the task + * parameter. + */ +static void prvRegTestTaskEntry1( void *pvParameters ); +extern void vRegTest1Implementation( void ); +static void prvRegTestTaskEntry2( void *pvParameters ); +extern void vRegTest2Implementation( void ); + +/* + * Register commands that can be used with FreeRTOS+CLI. The commands are + * defined in CLI-Commands.c and File-Related-CLI-Command.c respectively. + */ +extern void vRegisterSampleCLICommands( void ); + +/* + * The task that manages the FreeRTOS+CLI input and output. + */ +extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriority ); + +/* + * A high priority task that does nothing other than execute at a pseudo random + * time to ensure the other test tasks don't just execute in a repeating + * pattern. + */ +static void prvPseudoRandomiser( void *pvParameters ); + +/*-----------------------------------------------------------*/ + +/* The following two variables are used to communicate the status of the +register check tasks to the check task. If the variables keep incrementing, +then the register check tasks has not discovered any errors. If a variable +stops incrementing, then an error has been found. */ +volatile uint32_t ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL; + +/*-----------------------------------------------------------*/ + +void main_full( void ) +{ + /* Start all the other standard demo/test tasks. They have not particular + functionality, but do demonstrate how to use the FreeRTOS API and test the + kernel port. */ + vStartInterruptQueueTasks(); + vStartDynamicPriorityTasks(); + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vCreateBlockTimeTasks(); + vStartCountingSemaphoreTasks(); + vStartGenericQueueTasks( tskIDLE_PRIORITY ); + vStartRecursiveMutexTasks(); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartMathTasks( mainFLOP_TASK_PRIORITY ); + vStartTimerDemoTask( mainTIMER_TEST_PERIOD ); + vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY ); + vStartEventGroupTasks(); + vStartLEDFlashTasks( mainFLASH_PRIORITY ); + + /* Create the register check tasks, as described at the top of this file */ + xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL ); + + /* Create the task that just adds a little random behaviour. */ + xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL ); + + /* Create the task that performs the 'check' functionality, as described at + the top of this file. */ + xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); + + /* The set of tasks created by the following function call have to be + created last as they keep account of the number of tasks they expect to see + running. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + + /* Start the scheduler. */ + vTaskStartScheduler(); + + /* If all is well, the scheduler will now be running, and the following + line will never be reached. If the following line does execute, then + there was either insufficient FreeRTOS heap memory available for the idle + and/or timer tasks to be created, or vTaskStartScheduler() was called from + User mode. See the memory management section on the FreeRTOS web site for + more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The + mode from which main() is called is set in the C start up code and must be + a privileged mode (not user mode). */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static void prvCheckTask( void *pvParameters ) +{ +TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD; +TickType_t xLastExecutionTime; +static uint32_t ulLastRegTest1Value = 0, ulLastRegTest2Value = 0; +uint32_t ulErrorFound = pdFALSE; + + /* Just to stop compiler warnings. */ + ( void ) pvParameters; + + /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil() + works correctly. */ + xLastExecutionTime = xTaskGetTickCount(); + + /* Cycle for ever, delaying then checking all the other tasks are still + operating without error. The onboard LED is toggled on each iteration. + If an error is detected then the delay period is decreased from + mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the + effect of increasing the rate at which the onboard LED toggles, and in so + doing gives visual feedback of the system status. */ + for( ;; ) + { + /* Delay until it is time to execute again. */ + vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod ); + + /* Check all the demo tasks (other than the flash tasks) to ensure + that they are all still running, and that none have detected an error. */ + if( xAreIntQueueTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xAreMathsTaskStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xAreDynamicPriorityTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if ( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xIsCreateTaskStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS ) + { + ulErrorFound = pdTRUE; + } + + if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) + { + ulErrorFound = pdTRUE; + } + + if( xIsQueueOverwriteTaskStillRunning() != pdPASS ) + { + ulErrorFound = pdTRUE; + } + + if( xAreEventGroupTasksStillRunning() != pdPASS ) + { + ulErrorFound = pdTRUE; + } + + /* Check that the register test 1 task is still running. */ + if( ulLastRegTest1Value == ulRegTest1LoopCounter ) + { + ulErrorFound = pdTRUE; + } + ulLastRegTest1Value = ulRegTest1LoopCounter; + + /* Check that the register test 2 task is still running. */ + if( ulLastRegTest2Value == ulRegTest2LoopCounter ) + { + ulErrorFound = pdTRUE; + } + ulLastRegTest2Value = ulRegTest2LoopCounter; + + /* Toggle the check LED to give an indication of the system status. If + the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then + everything is ok. A faster toggle indicates an error. */ + vParTestToggleLED( mainCHECK_LED ); + + if( ulErrorFound != pdFALSE ) + { + /* An error has been detected in one of the tasks - flash the LED + at a higher frequency to give visible feedback that something has + gone wrong (it might just be that the loop back connector required + by the comtest tasks has not been fitted). */ + xDelayPeriod = mainERROR_CHECK_TASK_PERIOD; + } + } +} +/*-----------------------------------------------------------*/ + +static void prvRegTestTaskEntry1( void *pvParameters ) +{ + /* Although the regtest task is written in assembler, its entry point is + written in C for convenience of checking the task parameter is being passed + in correctly. */ + if( pvParameters == mainREG_TEST_TASK_1_PARAMETER ) + { + /* Start the part of the test that is written in assembler. */ + vRegTest1Implementation(); + } + + /* The following line will only execute if the task parameter is found to + be incorrect. The check timer will detect that the regtest loop counter is + not being incremented and flag an error. */ + vTaskDelete( NULL ); +} +/*-----------------------------------------------------------*/ + +static void prvRegTestTaskEntry2( void *pvParameters ) +{ + /* Although the regtest task is written in assembler, its entry point is + written in C for convenience of checking the task parameter is being passed + in correctly. */ + if( pvParameters == mainREG_TEST_TASK_2_PARAMETER ) + { + /* Start the part of the test that is written in assembler. */ + vRegTest2Implementation(); + } + + /* The following line will only execute if the task parameter is found to + be incorrect. The check timer will detect that the regtest loop counter is + not being incremented and flag an error. */ + vTaskDelete( NULL ); +} +/*-----------------------------------------------------------*/ + +static void prvPseudoRandomiser( void *pvParameters ) +{ +const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS ); +volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue; + + /* This task does nothing other than ensure there is a little bit of + disruption in the scheduling pattern of the other tasks. Normally this is + done by generating interrupts at pseudo random times. */ + for( ;; ) + { + ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement; + ulValue = ( ulNextRand >> 16UL ) & 0xffUL; + + if( ulValue < ulMinDelay ) + { + ulValue = ulMinDelay; + } + + vTaskDelay( ulValue ); + + while( ulValue > 0 ) + { + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + + ulValue--; + } + } +} + + + + + + diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h index 397951927..0599b961d 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h @@ -66,6 +66,9 @@ #ifndef FREERTOS_CONFIG_H #define FREERTOS_CONFIG_H +/* Hardware specifics. */ +#include "r_cg_iodefine.h" + /* Prevent Renesas headers redefining some stdint.h types. */ #define __TYPEDEF__ 1 diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c index 664ca3640..bd0b3b49f 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c @@ -148,14 +148,14 @@ void vInitialiseTimerForIntQueueTest( void ) } /*-----------------------------------------------------------*/ -#pragma interrupt ( Excep_PERIB_INTB128( vect = 128 ) ) +#pragma interrupt ( Excep_PERIB_INTB128( vect = 128, enable ) ) void Excep_PERIB_INTB128( void ) { portYIELD_FROM_ISR( xFirstTimerHandler() ); } /*-----------------------------------------------------------*/ -#pragma interrupt ( Excep_PERIB_INTB129( vect = 129 ) ) +#pragma interrupt ( Excep_PERIB_INTB129( vect = 129, enable ) ) void Excep_PERIB_INTB129( void ) { portYIELD_FROM_ISR( xSecondTimerHandler() ); diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c index 1617e8b71..bceae9ca7 100644 --- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c +++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c @@ -138,7 +138,7 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ); void vApplicationTickHook( void ); /*-----------------------------------------------------------*/ - +uint32_t ul1, ul2; int main( void ) { /* Configure the hardware ready to run the demo. */ -- 2.39.5