From 39ea95c5b07d17ebefe3b16f7b83baffdcab7d2b Mon Sep 17 00:00:00 2001 From: richardbarry Date: Tue, 17 Jan 2012 10:34:00 +0000 Subject: [PATCH] IntQ test in and working. Nesting depth not yet checked. Other tasks commented out of main(). git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1665 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- .../Source/Common_Demo_Tasks/IntQueue.c | 744 ++++++++++++++++++ .../Common_Demo_Tasks/include/IntQueue.h | 68 ++ .../RTOSDemo/Source/FreeRTOSConfig.h | 8 +- .../RTOSDemo/Source/IntQueueTimer.c | 125 +++ .../RTOSDemo/Source/IntQueueTimer.h | 62 ++ .../RTOSDemo/Source/cr_startup_lpc11.c | 52 ++ .../RTOSDemo/Source/main.c | 60 +- 7 files changed, 1107 insertions(+), 12 deletions(-) create mode 100644 Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/IntQueue.c create mode 100644 Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/include/IntQueue.h create mode 100644 Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c create mode 100644 Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/IntQueue.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/IntQueue.c new file mode 100644 index 000000000..ea6985cc1 --- /dev/null +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/IntQueue.c @@ -0,0 +1,744 @@ +/* + FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* + * This file defines one of the more complex set of demo/test tasks. They are + * designed to stress test the queue implementation though pseudo simultaneous + * multiple reads and multiple writes from both tasks of varying priority and + * interrupts. The interrupts are prioritised such to ensure that nesting + * occurs (for those ports that support it). + * + * The test ensures that, while being accessed from three tasks and two + * interrupts, all the data sent to the queues is also received from + * the same queue, and that no duplicate items are either sent or received. + * The tests also ensure that a low priority task is never able to successfully + * read from or write to a queue when a task of higher priority is attempting + * the same operation. + */ + +/* Standard includes. */ +#include + +/* SafeRTOS includes. */ +#include "FreeRTOS.h" +#include "queue.h" +#include "task.h" + +/* Demo app includes. */ +#include "IntQueue.h" +#include "IntQueueTimer.h" + +/* Priorities used by test tasks. */ +#ifndef intqHIGHER_PRIORITY + #define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 2 ) +#endif +#define intqLOWER_PRIORITY ( tskIDLE_PRIORITY ) + +/* The number of values to send/receive before checking that all values were +processed as expected. */ +#define intqNUM_VALUES_TO_LOG ( 200 ) +#define intqSHORT_DELAY ( 75 ) + +/* The value by which the value being sent to or received from a queue should +increment past intqNUM_VALUES_TO_LOG before we check that all values have been +sent/received correctly. This is done to ensure that all tasks and interrupts +accessing the queue have completed their accesses with the +intqNUM_VALUES_TO_LOG range. */ +#define intqVALUE_OVERRUN ( 50 ) + +/* The delay used by the polling task. A short delay is used for code +coverage. */ +#define intqONE_TICK_DELAY ( 1 ) + +/* Each task and interrupt is given a unique identifier. This value is used to +identify which task sent or received each value. The identifier is also used +to distinguish between two tasks that are running the same task function. */ +#define intqHIGH_PRIORITY_TASK1 ( ( unsigned portBASE_TYPE ) 1 ) +#define intqHIGH_PRIORITY_TASK2 ( ( unsigned portBASE_TYPE ) 2 ) +#define intqLOW_PRIORITY_TASK ( ( unsigned portBASE_TYPE ) 3 ) +#define intqFIRST_INTERRUPT ( ( unsigned portBASE_TYPE ) 4 ) +#define intqSECOND_INTERRUPT ( ( unsigned portBASE_TYPE ) 5 ) +#define intqQUEUE_LENGTH ( ( unsigned portBASE_TYPE ) 10 ) + +/* At least intqMIN_ACCEPTABLE_TASK_COUNT values should be sent to/received +from each queue by each task, otherwise an error is detected. */ +#define intqMIN_ACCEPTABLE_TASK_COUNT ( 5 ) + +/* Send the next value to the queue that is normally empty. This is called +from within the interrupts. */ +#define timerNORMALLY_EMPTY_TX() \ + if( xQueueIsQueueFullFromISR( xNormallyEmptyQueue ) != pdTRUE ) \ + { \ + unsigned portBASE_TYPE uxSavedInterruptStatus; \ + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ + { \ + uxValueForNormallyEmptyQueue++; \ + xQueueSendFromISR( xNormallyEmptyQueue, ( void * ) &uxValueForNormallyEmptyQueue, &xHigherPriorityTaskWoken ); \ + } \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ + } \ + +/* Send the next value to the queue that is normally full. This is called +from within the interrupts. */ +#define timerNORMALLY_FULL_TX() \ + if( xQueueIsQueueFullFromISR( xNormallyFullQueue ) != pdTRUE ) \ + { \ + unsigned portBASE_TYPE uxSavedInterruptStatus; \ + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ + { \ + uxValueForNormallyFullQueue++; \ + xQueueSendFromISR( xNormallyFullQueue, ( void * ) &uxValueForNormallyFullQueue, &xHigherPriorityTaskWoken ); \ + } \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ + } \ + +/* Receive a value from the normally empty queue. This is called from within +an interrupt. */ +#define timerNORMALLY_EMPTY_RX() \ + if( xQueueReceiveFromISR( xNormallyEmptyQueue, &uxRxedValue, &xHigherPriorityTaskWoken ) != pdPASS ) \ + { \ + prvQueueAccessLogError( __LINE__ ); \ + } \ + else \ + { \ + prvRecordValue_NormallyEmpty( uxRxedValue, intqSECOND_INTERRUPT ); \ + } + +/* Receive a value from the normally full queue. This is called from within +an interrupt. */ +#define timerNORMALLY_FULL_RX() \ + if( xQueueReceiveFromISR( xNormallyFullQueue, &uxRxedValue, &xHigherPriorityTaskWoken ) == pdPASS ) \ + { \ + prvRecordValue_NormallyFull( uxRxedValue, intqSECOND_INTERRUPT ); \ + } \ + + +/*-----------------------------------------------------------*/ + +/* The two queues used by the test. */ +static xQueueHandle xNormallyEmptyQueue, xNormallyFullQueue; + +/* Variables used to detect a stall in one of the tasks. */ +static unsigned portBASE_TYPE uxHighPriorityLoops1 = 0, uxHighPriorityLoops2 = 0, uxLowPriorityLoops1 = 0, uxLowPriorityLoops2 = 0; + +/* Any unexpected behaviour sets xErrorStatus to fail and log the line that +caused the error in xErrorLine. */ +static portBASE_TYPE xErrorStatus = pdPASS; +static volatile unsigned portBASE_TYPE xErrorLine = ( unsigned portBASE_TYPE ) 0; + +/* Used for sequencing between tasks. */ +static portBASE_TYPE xWasSuspended = pdFALSE; + +/* The values that are sent to the queues. An incremented value is sent each +time to each queue. */ +volatile unsigned portBASE_TYPE uxValueForNormallyEmptyQueue = 0, uxValueForNormallyFullQueue = 0; + +/* A handle to some of the tasks is required so they can be suspended/resumed. */ +xTaskHandle xHighPriorityNormallyEmptyTask1, xHighPriorityNormallyEmptyTask2, xHighPriorityNormallyFullTask1, xHighPriorityNormallyFullTask2; + +/* When a value is received in a queue the value is ticked off in the array +the array position of the value is set to a the identifier of the task or +interrupt that accessed the queue. This way missing or duplicate values can be +detected. */ +static unsigned portCHAR ucNormallyEmptyReceivedValues[ intqNUM_VALUES_TO_LOG ] = { 0 }; +static unsigned portCHAR ucNormallyFullReceivedValues[ intqNUM_VALUES_TO_LOG ] = { 0 }; + +/* The test tasks themselves. */ +static void prvLowerPriorityNormallyEmptyTask( void *pvParameters ); +static void prvLowerPriorityNormallyFullTask( void *pvParameters ); +static void prvHigherPriorityNormallyEmptyTask( void *pvParameters ); +static void prv1stHigherPriorityNormallyFullTask( void *pvParameters ); +static void prv2ndHigherPriorityNormallyFullTask( void *pvParameters ); + +/* Used to mark the positions within the ucNormallyEmptyReceivedValues and +ucNormallyFullReceivedValues arrays, while checking for duplicates. */ +static void prvRecordValue_NormallyEmpty( unsigned portBASE_TYPE uxValue, unsigned portBASE_TYPE uxSource ); +static void prvRecordValue_NormallyFull( unsigned portBASE_TYPE uxValue, unsigned portBASE_TYPE uxSource ); + +/* Logs the line on which an error occurred. */ +static void prvQueueAccessLogError( unsigned portBASE_TYPE uxLine ); + +/*-----------------------------------------------------------*/ + +void vStartInterruptQueueTasks( void ) +{ + /* Start the test tasks. */ + xTaskCreate( prvHigherPriorityNormallyEmptyTask, ( signed portCHAR * ) "H1QRx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK1, intqHIGHER_PRIORITY, &xHighPriorityNormallyEmptyTask1 ); + xTaskCreate( prvHigherPriorityNormallyEmptyTask, ( signed portCHAR * ) "H2QRx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK2, intqHIGHER_PRIORITY, &xHighPriorityNormallyEmptyTask2 ); + xTaskCreate( prvLowerPriorityNormallyEmptyTask, ( signed portCHAR * ) "LQRx", configMINIMAL_STACK_SIZE, NULL, intqLOWER_PRIORITY, NULL ); + xTaskCreate( prv1stHigherPriorityNormallyFullTask, ( signed portCHAR * ) "H1QTx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK1, intqHIGHER_PRIORITY, &xHighPriorityNormallyFullTask1 ); + xTaskCreate( prv2ndHigherPriorityNormallyFullTask, ( signed portCHAR * ) "H2QTx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK2, intqHIGHER_PRIORITY, &xHighPriorityNormallyFullTask2 ); + xTaskCreate( prvLowerPriorityNormallyFullTask, ( signed portCHAR * ) "LQRx", configMINIMAL_STACK_SIZE, NULL, intqLOWER_PRIORITY, NULL ); + + /* Create the queues that are accessed by multiple tasks and multiple + interrupts. */ + xNormallyFullQueue = xQueueCreate( intqQUEUE_LENGTH, ( unsigned portBASE_TYPE ) sizeof( unsigned portBASE_TYPE ) ); + xNormallyEmptyQueue = xQueueCreate( intqQUEUE_LENGTH, ( unsigned portBASE_TYPE ) sizeof( unsigned portBASE_TYPE ) ); + + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + in use. The queue registry is provided as a means for kernel aware + debuggers to locate queues and has no purpose if a kernel aware debugger + is not being used. The call to vQueueAddToRegistry() will be removed + by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + defined to be less than 1. */ + vQueueAddToRegistry( xNormallyFullQueue, ( signed portCHAR * ) "NormallyFull" ); + vQueueAddToRegistry( xNormallyEmptyQueue, ( signed portCHAR * ) "NormallyEmpty" ); +} +/*-----------------------------------------------------------*/ + +static void prvRecordValue_NormallyFull( unsigned portBASE_TYPE uxValue, unsigned portBASE_TYPE uxSource ) +{ + if( uxValue < intqNUM_VALUES_TO_LOG ) + { + /* We don't expect to receive the same value twice, so if the value + has already been marked as received an error has occurred. */ + if( ucNormallyFullReceivedValues[ uxValue ] != 0x00 ) + { + prvQueueAccessLogError( __LINE__ ); + } + + /* Log that this value has been received. */ + ucNormallyFullReceivedValues[ uxValue ] = uxSource; + } +} +/*-----------------------------------------------------------*/ + +static void prvRecordValue_NormallyEmpty( unsigned portBASE_TYPE uxValue, unsigned portBASE_TYPE uxSource ) +{ + if( uxValue < intqNUM_VALUES_TO_LOG ) + { + /* We don't expect to receive the same value twice, so if the value + has already been marked as received an error has occurred. */ + if( ucNormallyEmptyReceivedValues[ uxValue ] != 0x00 ) + { + prvQueueAccessLogError( __LINE__ ); + } + + /* Log that this value has been received. */ + ucNormallyEmptyReceivedValues[ uxValue ] = uxSource; + } +} +/*-----------------------------------------------------------*/ + +static void prvQueueAccessLogError( unsigned portBASE_TYPE uxLine ) +{ + /* Latch the line number that caused the error. */ + xErrorLine = uxLine; + xErrorStatus = pdFAIL; +} +/*-----------------------------------------------------------*/ + +static void prvHigherPriorityNormallyEmptyTask( void *pvParameters ) +{ +unsigned portBASE_TYPE uxRxed, ux, uxTask1, uxTask2, uxInterrupts, uxErrorCount1 = 0, uxErrorCount2 = 0; + + /* The timer should not be started until after the scheduler has started. + More than one task is running this code so we check the parameter value + to determine which task should start the timer. */ + if( ( unsigned portBASE_TYPE ) pvParameters == intqHIGH_PRIORITY_TASK1 ) + { + vInitialiseTimerForIntQueueTest(); + } + + for( ;; ) + { + /* Block waiting to receive a value from the normally empty queue. + Interrupts will write to the queue so we should receive a value. */ + if( xQueueReceive( xNormallyEmptyQueue, &uxRxed, intqSHORT_DELAY ) != pdPASS ) + { + prvQueueAccessLogError( __LINE__ ); + } + else + { + /* Note which value was received so we can check all expected + values are received and no values are duplicated. */ + prvRecordValue_NormallyEmpty( uxRxed, ( unsigned portBASE_TYPE ) pvParameters ); + } + + /* Ensure the other task running this code gets a chance to execute. */ + taskYIELD(); + + if( ( unsigned portBASE_TYPE ) pvParameters == intqHIGH_PRIORITY_TASK1 ) + { + /* Have we received all the expected values? */ + if( uxValueForNormallyEmptyQueue > ( intqNUM_VALUES_TO_LOG + intqVALUE_OVERRUN ) ) + { + vTaskSuspend( xHighPriorityNormallyEmptyTask2 ); + + uxTask1 = 0; + uxTask2 = 0; + uxInterrupts = 0; + + /* Loop through the array, checking that both tasks have + placed values into the array, and that no values are missing. + Start at 1 as we expect position 0 to be unused. */ + for( ux = 1; ux < intqNUM_VALUES_TO_LOG; ux++ ) + { + if( ucNormallyEmptyReceivedValues[ ux ] == 0 ) + { + /* A value is missing. */ + prvQueueAccessLogError( __LINE__ ); + } + else + { + if( ucNormallyEmptyReceivedValues[ ux ] == intqHIGH_PRIORITY_TASK1 ) + { + /* Value was placed into the array by task 1. */ + uxTask1++; + } + else if( ucNormallyEmptyReceivedValues[ ux ] == intqHIGH_PRIORITY_TASK2 ) + { + /* Value was placed into the array by task 2. */ + uxTask2++; + } + else if( ucNormallyEmptyReceivedValues[ ux ] == intqSECOND_INTERRUPT ) + { + uxInterrupts++; + } + } + } + + if( uxTask1 < intqMIN_ACCEPTABLE_TASK_COUNT ) + { + /* Only task 2 seemed to log any values. */ + uxErrorCount1++; + if( uxErrorCount1 > 2 ) + { + prvQueueAccessLogError( __LINE__ ); + } + } + else + { + uxErrorCount1 = 0; + } + + if( uxTask2 < intqMIN_ACCEPTABLE_TASK_COUNT ) + { + /* Only task 1 seemed to log any values. */ + uxErrorCount2++; + if( uxErrorCount2 > 2 ) + { + prvQueueAccessLogError( __LINE__ ); + } + } + else + { + uxErrorCount2 = 0; + } + + if( uxInterrupts == 0 ) + { + prvQueueAccessLogError( __LINE__ ); + } + + /* Clear the array again, ready to start a new cycle. */ + memset( ucNormallyEmptyReceivedValues, 0x00, sizeof( ucNormallyEmptyReceivedValues ) ); + + uxHighPriorityLoops1++; + uxValueForNormallyEmptyQueue = 0; + + /* Suspend ourselves, allowing the lower priority task to + actually receive something from the queue. Until now it + will have been prevented from doing so by the higher + priority tasks. The lower priority task will resume us + if it receives something. We will then resume the other + higher priority task. */ + vTaskSuspend( NULL ); + vTaskResume( xHighPriorityNormallyEmptyTask2 ); + } + } + } +} +/*-----------------------------------------------------------*/ + +static void prvLowerPriorityNormallyEmptyTask( void *pvParameters ) +{ +unsigned portBASE_TYPE uxValue, uxRxed; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + for( ;; ) + { + if( xQueueReceive( xNormallyEmptyQueue, &uxRxed, intqONE_TICK_DELAY ) != errQUEUE_EMPTY ) + { + /* We should only obtain a value when the high priority task is + suspended. */ + if( xTaskIsTaskSuspended( xHighPriorityNormallyEmptyTask1 ) == pdFALSE ) + { + prvQueueAccessLogError( __LINE__ ); + } + + prvRecordValue_NormallyEmpty( uxRxed, intqLOW_PRIORITY_TASK ); + + /* Wake the higher priority task again. */ + vTaskResume( xHighPriorityNormallyEmptyTask1 ); + uxLowPriorityLoops1++; + } + else + { + /* Raise our priority while we send so we can preempt the higher + priority task, and ensure we get the Tx value into the queue. */ + vTaskPrioritySet( NULL, intqHIGHER_PRIORITY + 1 ); + + portENTER_CRITICAL(); + { + uxValueForNormallyEmptyQueue++; + uxValue = uxValueForNormallyEmptyQueue; + } + portEXIT_CRITICAL(); + + if( xQueueSend( xNormallyEmptyQueue, &uxValue, portMAX_DELAY ) != pdPASS ) + { + prvQueueAccessLogError( __LINE__ ); + } + + vTaskPrioritySet( NULL, intqLOWER_PRIORITY ); + } + } +} +/*-----------------------------------------------------------*/ + +static void prv1stHigherPriorityNormallyFullTask( void *pvParameters ) +{ +unsigned portBASE_TYPE uxValueToTx, ux, uxInterrupts; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + /* Make sure the queue starts full or near full. >> 1 as there are two + high priority tasks. */ + for( ux = 0; ux < ( intqQUEUE_LENGTH >> 1 ); ux++ ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ); + } + + for( ;; ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + if( xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ) != pdPASS ) + { + /* intqHIGH_PRIORITY_TASK2 is never suspended so we would not + expect it to ever time out. */ + prvQueueAccessLogError( __LINE__ ); + } + + /* Allow the other task running this code to run. */ + taskYIELD(); + + /* Have all the expected values been sent to the queue? */ + if( uxValueToTx > ( intqNUM_VALUES_TO_LOG + intqVALUE_OVERRUN ) ) + { + /* Make sure the other high priority task completes its send of + any values below intqNUM_VALUE_TO_LOG. */ + vTaskDelay( intqSHORT_DELAY ); + + vTaskSuspend( xHighPriorityNormallyFullTask2 ); + + if( xWasSuspended == pdTRUE ) + { + /* We would have expected the other high priority task to have + set this back to false by now. */ + prvQueueAccessLogError( __LINE__ ); + } + + /* Set the suspended flag so an error is not logged if the other + task recognises a time out when it is unsuspended. */ + xWasSuspended = pdTRUE; + + /* Check interrupts are also sending. */ + uxInterrupts = 0U; + + /* Start at 1 as we expect position 0 to be unused. */ + for( ux = 1; ux < intqNUM_VALUES_TO_LOG; ux++ ) + { + if( ucNormallyFullReceivedValues[ ux ] == 0 ) + { + /* A value was missing. */ + prvQueueAccessLogError( __LINE__ ); + } + else if( ucNormallyFullReceivedValues[ ux ] == intqSECOND_INTERRUPT ) + { + uxInterrupts++; + } + } + + if( uxInterrupts == 0 ) + { + /* No writes from interrupts were found. Are interrupts + actually running? */ + prvQueueAccessLogError( __LINE__ ); + } + + /* Reset the array ready for the next cycle. */ + memset( ucNormallyFullReceivedValues, 0x00, sizeof( ucNormallyFullReceivedValues ) ); + + uxHighPriorityLoops2++; + uxValueForNormallyFullQueue = 0; + + /* Suspend ourselves, allowing the lower priority task to + actually receive something from the queue. Until now it + will have been prevented from doing so by the higher + priority tasks. The lower priority task will resume us + if it receives something. We will then resume the other + higher priority task. */ + vTaskSuspend( NULL ); + vTaskResume( xHighPriorityNormallyFullTask2 ); + } + } +} +/*-----------------------------------------------------------*/ + +static void prv2ndHigherPriorityNormallyFullTask( void *pvParameters ) +{ +unsigned portBASE_TYPE uxValueToTx, ux; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + /* Make sure the queue starts full or near full. >> 1 as there are two + high priority tasks. */ + for( ux = 0; ux < ( intqQUEUE_LENGTH >> 1 ); ux++ ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ); + } + + for( ;; ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + if( xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ) != pdPASS ) + { + if( xWasSuspended != pdTRUE ) + { + /* It is ok to time out if the task has been suspended. */ + prvQueueAccessLogError( __LINE__ ); + } + } + + xWasSuspended = pdFALSE; + + taskYIELD(); + } +} +/*-----------------------------------------------------------*/ + +static void prvLowerPriorityNormallyFullTask( void *pvParameters ) +{ +unsigned portBASE_TYPE uxValue, uxTxed = 9999; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + for( ;; ) + { + if( xQueueSend( xNormallyFullQueue, &uxTxed, intqONE_TICK_DELAY ) != errQUEUE_FULL ) + { + /* We would only expect to succeed when the higher priority task + is suspended. */ + if( xTaskIsTaskSuspended( xHighPriorityNormallyFullTask1 ) == pdFALSE ) + { + prvQueueAccessLogError( __LINE__ ); + } + + vTaskResume( xHighPriorityNormallyFullTask1 ); + uxLowPriorityLoops2++; + } + else + { + /* Raise our priority while we receive so we can preempt the higher + priority task, and ensure we get the value from the queue. */ + vTaskPrioritySet( NULL, intqHIGHER_PRIORITY + 1 ); + + if( xQueueReceive( xNormallyFullQueue, &uxValue, portMAX_DELAY ) != pdPASS ) + { + prvQueueAccessLogError( __LINE__ ); + } + else + { + prvRecordValue_NormallyFull( uxValue, intqLOW_PRIORITY_TASK ); + } + + vTaskPrioritySet( NULL, intqLOWER_PRIORITY ); + } + } +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xFirstTimerHandler( void ) +{ +portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, uxRxedValue; +static unsigned portBASE_TYPE uxNextOperation = 0; + + /* Called from a timer interrupt. Perform various read and write + accesses on the queues. */ + + uxNextOperation++; + + if( uxNextOperation & ( unsigned portBASE_TYPE ) 0x01 ) + { + timerNORMALLY_EMPTY_TX(); + timerNORMALLY_EMPTY_TX(); + timerNORMALLY_EMPTY_TX(); + } + else + { + timerNORMALLY_FULL_RX(); + timerNORMALLY_FULL_RX(); + timerNORMALLY_FULL_RX(); + } + + return xHigherPriorityTaskWoken; +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xSecondTimerHandler( void ) +{ +unsigned portBASE_TYPE uxRxedValue; +portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; +static unsigned portBASE_TYPE uxNextOperation = 0; + + /* Called from a timer interrupt. Perform various read and write + accesses on the queues. */ + + uxNextOperation++; + + if( uxNextOperation & ( unsigned portBASE_TYPE ) 0x01 ) + { + timerNORMALLY_EMPTY_TX(); + timerNORMALLY_EMPTY_TX(); + + timerNORMALLY_EMPTY_RX(); + timerNORMALLY_EMPTY_RX(); + } + else + { + timerNORMALLY_FULL_RX(); + timerNORMALLY_FULL_TX(); + timerNORMALLY_FULL_TX(); + timerNORMALLY_FULL_TX(); + timerNORMALLY_FULL_TX(); + } + + return xHigherPriorityTaskWoken; +} +/*-----------------------------------------------------------*/ + + +portBASE_TYPE xAreIntQueueTasksStillRunning( void ) +{ +static unsigned portBASE_TYPE uxLastHighPriorityLoops1 = 0, uxLastHighPriorityLoops2 = 0, uxLastLowPriorityLoops1 = 0, uxLastLowPriorityLoops2 = 0; + + /* xErrorStatus can be set outside of this function. This function just + checks that all the tasks are still cycling. */ + + if( uxHighPriorityLoops1 == uxLastHighPriorityLoops1 ) + { + /* The high priority 1 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } + + uxLastHighPriorityLoops1 = uxHighPriorityLoops1; + + if( uxHighPriorityLoops2 == uxLastHighPriorityLoops2 ) + { + /* The high priority 2 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } + + uxLastHighPriorityLoops2 = uxHighPriorityLoops2; + + if( uxLowPriorityLoops1 == uxLastLowPriorityLoops1 ) + { + /* The low priority 1 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } + + uxLastLowPriorityLoops1 = uxLowPriorityLoops1; + + if( uxLowPriorityLoops2 == uxLastLowPriorityLoops2 ) + { + /* The low priority 2 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } + + uxLastLowPriorityLoops2 = uxLowPriorityLoops2; + + return xErrorStatus; +} + diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/include/IntQueue.h b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/include/IntQueue.h new file mode 100644 index 000000000..883c91b90 --- /dev/null +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/Common_Demo_Tasks/include/IntQueue.h @@ -0,0 +1,68 @@ +/* + FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef QUEUE_ACCESS_TEST +#define QUEUE_ACCESS_TEST + +void vStartInterruptQueueTasks( void ); +portBASE_TYPE xAreIntQueueTasksStillRunning( void ); +portBASE_TYPE xFirstTimerHandler( void ); +portBASE_TYPE xSecondTimerHandler( void ); + +#endif /* QUEUE_ACCESS_TEST */ + + + + + + diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h index fd078036b..9b9d9a80e 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h @@ -72,12 +72,12 @@ extern uint32_t SystemCoreClock; #define configUSE_PREEMPTION 1 #define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 +#define configUSE_TICK_HOOK 1 #define configCPU_CLOCK_HZ ( SystemCoreClock ) #define configTICK_RATE_HZ ( ( portTickType ) 1000 ) #define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 60 ) -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 7 * 1024 ) ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 6800 ) ) #define configMAX_TASK_NAME_LEN ( 5 ) #define configUSE_TRACE_FACILITY 1 #define configUSE_16_BIT_TICKS 0 @@ -92,7 +92,7 @@ extern uint32_t SystemCoreClock; #define configGENERATE_RUN_TIME_STATS 0 /* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 +#define configUSE_CO_ROUTINES 0 #define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) /* Software timer definitions. */ diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c new file mode 100644 index 000000000..796fd1c75 --- /dev/null +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c @@ -0,0 +1,125 @@ +/* + FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo includes. */ +#include "IntQueueTimer.h" +#include "IntQueue.h" + +/* Hardware includes. */ +#include "lpc11xx.h" + +/* The two timer frequencies. */ +#define tmrTIMER_2_FREQUENCY ( 2000UL ) +#define tmrTIMER_3_FREQUENCY ( 2001UL ) + +/* The priorities for the two timers. Note that a priority of 0 is the highest +possible on Cortex-M devices. */ +#define tmrMAX_PRIORITY ( 0UL ) +#define trmSECOND_HIGHEST_PRIORITY ( tmrMAX_PRIORITY + 1 ) + +void vInitialiseTimerForIntQueueTest( void ) +{ + /* Enable AHB clock for GPIO and 16-bit timers. */ + LPC_SYSCON->SYSAHBCLKCTRL |= ( 7 << 6 ); + + /* Interrupt and reset on MR0 match. */ + LPC_TMR16B0->MCR = 0x03; + LPC_TMR16B1->MCR = 0x03; + + /* Configure the frequency of the interrupt generated by MR0 matches. */ + LPC_TMR16B0->MR0 = SystemCoreClock / tmrTIMER_2_FREQUENCY; + LPC_TMR16B1->MR0 = SystemCoreClock / tmrTIMER_3_FREQUENCY; + + /* Don't generate interrupts until the scheduler has been started. + Interrupts will be automatically enabled when the first task starts + running. */ + taskDISABLE_INTERRUPTS(); + + /* Set the timer interrupts to be above the kernel. The interrupts are + assigned different priorities so they nest with each other. */ + NVIC_SetPriority( TIMER_16_0_IRQn, trmSECOND_HIGHEST_PRIORITY ); + NVIC_SetPriority( TIMER_16_1_IRQn, tmrMAX_PRIORITY ); + + /* Enable the timer interrupts. */ + NVIC_EnableIRQ( TIMER_16_0_IRQn ); + NVIC_EnableIRQ( TIMER_16_1_IRQn ); + + /* Start the timers. */ + LPC_TMR16B0->TCR = 0x01; + LPC_TMR16B1->TCR = 0x01; +} +/*-----------------------------------------------------------*/ + +void TIMER16_0_IRQHandler(void) +{ + /* Clear the interrupt. */ + LPC_TMR16B0->IR = LPC_TMR16B0->IR; + + /* Call the standard demo int queue timer function for this first timer. */ + portEND_SWITCHING_ISR( xFirstTimerHandler() ); +} +/*-----------------------------------------------------------*/ + +void TIMER16_1_IRQHandler(void) +{ + /* Clear the interrupt. */ + LPC_TMR16B1->IR = LPC_TMR16B1->IR; + + /* Call the standard demo int queue timer function for this second timer. */ + portEND_SWITCHING_ISR( xSecondTimerHandler() ); +} +/*-----------------------------------------------------------*/ diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h new file mode 100644 index 000000000..663b26f08 --- /dev/null +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h @@ -0,0 +1,62 @@ +/* + FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef INT_QUEUE_TIMER_H +#define INT_QUEUE_TIMER_H + +void vInitialiseTimerForIntQueueTest( void ); +portBASE_TYPE xTimer0Handler( void ); +portBASE_TYPE xTimer1Handler( void ); + +#endif + diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/cr_startup_lpc11.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/cr_startup_lpc11.c index d4972cc85..973bbc2a0 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/cr_startup_lpc11.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/cr_startup_lpc11.c @@ -333,9 +333,60 @@ void NMI_Handler(void) { } } + + + +void pop_registers_from_fault_stack(unsigned int * hardfault_args) +{ +volatile unsigned int stacked_r0; +volatile unsigned int stacked_r1; +volatile unsigned int stacked_r2; +volatile unsigned int stacked_r3; +volatile unsigned int stacked_r12; +volatile unsigned int stacked_lr; +volatile unsigned int stacked_pc; +volatile unsigned int stacked_psr; + + stacked_r0 = ((unsigned long) hardfault_args[0]); + stacked_r1 = ((unsigned long) hardfault_args[1]); + stacked_r2 = ((unsigned long) hardfault_args[2]); + stacked_r3 = ((unsigned long) hardfault_args[3]); + + stacked_r12 = ((unsigned long) hardfault_args[4]); + stacked_lr = ((unsigned long) hardfault_args[5]); + stacked_pc = ((unsigned long) hardfault_args[6]); + stacked_psr = ((unsigned long) hardfault_args[7]); + + /* Inspect stacked_pc to locate the offending instruction. */ + for( ;; ) + { + __asm volatile ( "NOP" ); + } +} + + + + __attribute__ ((section(".after_vectors"))) void HardFault_Handler(void) { + __asm volatile + ( + " mov r0, lr \n" + " mov r1, #4 \n" + " and r1, r0 \n" + " cmp r1, #0 \n" + " beq is_equal \n" + " mrs r0, psp \n" + " b is_done \n" + "is_equal: \n" + " mrs r0, msp \n" + "is_done: \n" + " ldr r1, [r0, #24] \n" + " ldr r2, handler2_address_const \n" + " bx r2 \n" + " handler2_address_const: .word pop_registers_from_fault_stack \n" + ); while(1) { } @@ -376,3 +427,4 @@ void IntDefaultHandler(void) } } + diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c index 10b984028..1aa576cbd 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c @@ -51,6 +51,9 @@ licensing and training services. */ +/* Standard includes. */ +#include "string.h" + /* Kernel includes. */ #include "FreeRTOS.h" #include "task.h" @@ -63,6 +66,7 @@ #include "countsem.h" #include "GenQTest.h" #include "recmutex.h" +#include "IntQueue.h" /* Hardware specific includes. */ #include "lpc11xx.h" @@ -83,6 +87,12 @@ in ticks using the portTICK_RATE_MS constant. */ /* A block time of zero simply means "don't block". */ #define mainDONT_BLOCK ( 0UL ) +#define mainCHECK_INTERRUPT_STACK 1 + +#if mainCHECK_INTERRUPT_STACK == 1 + const unsigned char ucExpectedInterruptStackValues[] = { 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC }; +#endif + /*-----------------------------------------------------------*/ /* @@ -128,11 +138,12 @@ xTimerHandle xCheckTimer = NULL; prvSetupHardware(); /* Create the standard demo tasks. */ - vStartDynamicPriorityTasks(); - vCreateBlockTimeTasks(); - vStartCountingSemaphoreTasks(); - vStartGenericQueueTasks( tskIDLE_PRIORITY ); - vStartRecursiveMutexTasks(); +// vStartDynamicPriorityTasks(); +// vCreateBlockTimeTasks(); +// vStartCountingSemaphoreTasks(); +// vStartGenericQueueTasks( tskIDLE_PRIORITY ); +// vStartRecursiveMutexTasks(); + vStartInterruptQueueTasks(); /* Create the register test tasks as described at the top of this file. */ xTaskCreate( vRegTest1Task, /* Function that implements the task. */ @@ -183,7 +194,10 @@ unsigned long ulErrorFound = pdFALSE; /* Check all the demo and test tasks to ensure that they are all still running, and that none have detected an error. */ - + if( xAreIntQueueTasksStillRunning() != pdPASS ) + { + ulErrorFound |= ( 0x01UL << 0UL ); + } /* Check that the register test 1 task is still running. */ if( ulLastRegTest1Value == ulRegTest1LoopCounter ) @@ -225,11 +239,31 @@ unsigned long ulErrorFound = pdFALSE; static void prvSetupHardware( void ) { - /* Enable AHB clock to the GPIO domain. */ - LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6); +extern unsigned long _vStackTop[], _pvHeapStart[]; +unsigned long ulInterruptStackSize; + + /* Enable AHB clock for GPIO. */ + LPC_SYSCON->SYSAHBCLKCTRL |= ( 1 << 6 ); /* Configure GPIO for LED output. */ xGPIO0->DIR |= mainLED_BIT; + + /* The size of the stack used by main and interrupts is not defined in + the linker, but just uses whatever RAM is left. Calculate the amount of + RAM available for the main/interrupt/system stack, and check it against + a reasonable number. If this assert is hit then it is likely you don't + have enough stack to start the kernel, or to allow interrupts to nest. + Note - this is separate to the stacks that are used by tasks. The stacks + that are used by tasks are automatically checked if + configCHECK_FOR_STACK_OVERFLOW is not 0 in FreeRTOSConfig.h - but the stack + used by interrupts is not. Reducing the conifgTOTAL_HEAP_SIZE setting will + increase the stack available to main() and interrupts. */ + ulInterruptStackSize = ( ( unsigned long ) _vStackTop ) - ( ( unsigned long ) _pvHeapStart ); + configASSERT( ulInterruptStackSize > 350UL ); + + /* Fill the stack used by main() and interrupts to a known value, so its + use can be manually checked. */ + memcpy( ( void * ) _pvHeapStart, ucExpectedInterruptStackValues, sizeof( ucExpectedInterruptStackValues ) ); } /*-----------------------------------------------------------*/ @@ -296,11 +330,21 @@ void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName void vApplicationTickHook( void ) { +#if mainCHECK_INTERRUPT_STACK == 1 +extern unsigned long _pvHeapStart[]; + /* This function will be called by each tick interrupt if configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be added here, but the tick hook is called from an interrupt context, so code must not attempt to block, and only the interrupt safe FreeRTOS API functions can be used (those that end in FromISR()). */ + + /* Manually check the last few bytes of the interrupt stack to check they + have not been overwritten. Note - the task stacks are automatically + checked for overflow if configCHECK_FOR_STACK_OVERFLOW is set to 1 or 2 + in FreeRTOSConifg.h, but the interrupt stack is not. */ + configASSERT( memcmp( ( void * ) _pvHeapStart, ucExpectedInterruptStackValues, sizeof( ucExpectedInterruptStackValues ) ) == 0U ); +#endif /* mainCHECK_INTERRUPT_STACK */ } /*-----------------------------------------------------------*/ -- 2.39.5