From 3c2dd537c77277e17f414dd74cbc44ce455cccfe Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Mon, 16 Jan 2017 07:04:02 -0700
Subject: [PATCH] x86: Add a link script for SPL

If SPL is used it is always build in 32-bit mode. Add a link script to
handle the correct placement of the sections.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 arch/x86/cpu/u-boot-spl.lds | 74 +++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 arch/x86/cpu/u-boot-spl.lds

diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds
new file mode 100644
index 0000000000..8a38d58f12
--- /dev/null
+++ b/arch/x86/cpu/u-boot-spl.lds
@@ -0,0 +1,74 @@
+/*
+ * (C) Copyright 2002
+ * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+ENTRY(_start)
+
+SECTIONS
+{
+#ifndef CONFIG_CMDLINE
+	/DISCARD/ : { *(.u_boot_list_2_cmd_*) }
+#endif
+
+	. = CONFIG_SPL_TEXT_BASE;	/* Location of bootcode in flash */
+	__text_start = .;
+	.text  : { *(.text*); }
+
+	. = ALIGN(4);
+
+	. = ALIGN(4);
+	.u_boot_list : {
+		KEEP(*(SORT(.u_boot_list*)));
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+	. = ALIGN(4);
+	.data : { *(.data*) }
+
+	. = ALIGN(4);
+	__data_end = .;
+	__init_end = .;
+
+        _image_binary_end = .;
+
+	. = 0x120000;
+	.bss (OVERLAY) : {
+		__bss_start = .;
+		*(.bss*)
+		*(COM*)
+		. = ALIGN(4);
+		__bss_end = .;
+	}
+	__bss_size = __bss_end - __bss_start;
+
+	/DISCARD/ : { *(.dynstr*) }
+	/DISCARD/ : { *(.dynamic*) }
+	/DISCARD/ : { *(.plt*) }
+	/DISCARD/ : { *(.interp*) }
+	/DISCARD/ : { *(.gnu*) }
+
+#ifdef CONFIG_SPL_X86_16BIT_INIT
+	/*
+	 * The following expressions place the 16-bit Real-Mode code and
+	 * Reset Vector at the end of the Flash ROM
+	 */
+	. = START_16 - RESET_SEG_START;
+	.start16 : AT (START_16) {
+		KEEP(*(.start16));
+	}
+
+	. = RESET_VEC_LOC - RESET_SEG_START;
+	.resetvec : AT (RESET_VEC_LOC) {
+		KEEP(*(.resetvec));
+	}
+#endif
+
+}
-- 
2.39.5