From 43b77f26b3d2f72676f77525fc3f30db584a6189 Mon Sep 17 00:00:00 2001
From: richardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Sat, 11 Aug 2012 20:57:11 +0000
Subject: [PATCH] Update MPS430X ports so the sleep mode bits are cleared on
 exit from the tick interrupt. Update heap_4.c.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1762 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---
 Source/portable/CCS/MSP430X/port.c      |  1 +
 Source/portable/CCS/MSP430X/portext.asm |  6 ----
 Source/portable/IAR/MSP430X/port.c      |  1 +
 Source/portable/IAR/MSP430X/portext.s43 | 38 +++++++++++--------------
 Source/portable/MemMang/heap_4.c        | 15 ++++++----
 5 files changed, 29 insertions(+), 32 deletions(-)

diff --git a/Source/portable/CCS/MSP430X/port.c b/Source/portable/CCS/MSP430X/port.c
index ad7418555..e61eda440 100644
--- a/Source/portable/CCS/MSP430X/port.c
+++ b/Source/portable/CCS/MSP430X/port.c
@@ -213,6 +213,7 @@ interrupt void vTickISREntry( void )
 {
 extern void vPortTickISR( void );
 
+	__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
 	#if configUSE_PREEMPTION == 1
 		extern void vPortPreemptiveTickISR( void );
 		vPortPreemptiveTickISR();
diff --git a/Source/portable/CCS/MSP430X/portext.asm b/Source/portable/CCS/MSP430X/portext.asm
index 7a4deebd6..a546876ee 100644
--- a/Source/portable/CCS/MSP430X/portext.asm
+++ b/Source/portable/CCS/MSP430X/portext.asm
@@ -88,12 +88,6 @@ portRESTORE_CONTEXT .macro
 	pop_x	r15
 	mov.w	r15, &usCriticalNesting
 	popm_x	#12, r15
-		
-	;The last thing on the stack will be the status register.
-    ;Ensure the power down bits are clear ready for the next
-    ;time this power down register is popped from the stack.
-	bic.w   #0xf0, 0( sp )
-		
 	pop.w	sr
 	ret_x
 	.endm
diff --git a/Source/portable/IAR/MSP430X/port.c b/Source/portable/IAR/MSP430X/port.c
index 6dd8826ee..daa9aee94 100644
--- a/Source/portable/IAR/MSP430X/port.c
+++ b/Source/portable/IAR/MSP430X/port.c
@@ -214,6 +214,7 @@ __interrupt __raw void vTickISREntry( void )
 {
 extern void vPortTickISR( void );
 
+	__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
 	vPortTickISR();
 }
 
diff --git a/Source/portable/IAR/MSP430X/portext.s43 b/Source/portable/IAR/MSP430X/portext.s43
index 3d3d7a4cf..1cd98b57c 100644
--- a/Source/portable/IAR/MSP430X/portext.s43
+++ b/Source/portable/IAR/MSP430X/portext.s43
@@ -95,12 +95,6 @@ portRESTORE_CONTEXT macro
 	pop_x	r15
 	mov.w	r15, &usCriticalNesting
 	popm_x	#12, r15
-		
-	/* The last thing on the stack will be the status register.
-	Ensure the power down bits are clear ready for the next
-	time this power down register is popped from the stack. */
-	bic.w   #0xf0, 0( sp )
-		
 	pop.w	sr
 	reta
 	endm
@@ -115,23 +109,25 @@ portRESTORE_CONTEXT macro
  *
  * If the preemptive scheduler is in use a context switch can also occur.
  */
-	
+
 	RSEG CODE
 	EVEN
-	
+
 vPortTickISR:
-	
+
 	/* The sr is not saved in portSAVE_CONTEXT() because vPortYield() needs
-	to save it manually before it gets modified (interrupts get disabled). */
+	to save it manually before it gets modified (interrupts get disabled).
+	Entering through this interrupt means the SR is already on the stack, but
+	this keeps the stack frames identical. */
 	push.w sr
 	portSAVE_CONTEXT
-				
+
 	calla	#vTaskIncrementTick
 
 	#if configUSE_PREEMPTION == 1
 		calla	#vTaskSwitchContext
 	#endif
-		
+
 	portRESTORE_CONTEXT
 /*-----------------------------------------------------------*/
 
@@ -139,21 +135,21 @@ vPortTickISR:
  * Manual context switch called by the portYIELD() macro.
  */
  	EVEN
-	
+
 vPortYield:
 
 	/* The sr needs saving before it is modified. */
 	push.w	sr
-	
+
 	/* Now the SR is stacked we can disable interrupts. */
-	dint	
+	dint
 	nop
-				
+
 	/* Save the context of the current task. */
-	portSAVE_CONTEXT			
+	portSAVE_CONTEXT
 
 	/* Select the next task to run. */
-	calla	#vTaskSwitchContext		
+	calla	#vTaskSwitchContext
 
 	/* Restore the context of the new task. */
 	portRESTORE_CONTEXT
@@ -165,7 +161,7 @@ vPortYield:
  * the context of the first task.
  */
  	EVEN
-	
+
 xPortStartScheduler:
 
 	/* Setup the hardware to generate the tick.  Interrupts are disabled
@@ -175,6 +171,6 @@ xPortStartScheduler:
 	/* Restore the context of the first task that is going to run. */
 	portRESTORE_CONTEXT
 /*-----------------------------------------------------------*/
-      		
+
 	END
-		
+
diff --git a/Source/portable/MemMang/heap_4.c b/Source/portable/MemMang/heap_4.c
index 794684e90..f04f7d6d2 100644
--- a/Source/portable/MemMang/heap_4.c
+++ b/Source/portable/MemMang/heap_4.c
@@ -356,7 +356,7 @@ unsigned char *puc;
 }
 
 
-#define INCLUDE_TEST_CODE 1
+#define INCLUDE_TEST_CODE 0
 #if INCLUDE_TEST_CODE == 1
 
 #define heapMAX_TEST_BLOCKS 6
@@ -366,6 +366,7 @@ void vTestHeap4( void )
 void *pvReturned;
 static void *pvUsedBlocks[ heapMAX_TEST_BLOCKS ];
 unsigned long ulIndex = 0, ulSize, ulRandSample;
+size_t xSize1, xSize2, xSize3;
 static const unsigned long ulCombinations[ 6 ][ 3 ] =
 {
 	{ 0, 1, 2 },
@@ -530,13 +531,17 @@ static const unsigned long ulCombinations[ 6 ][ 3 ] =
 	}
 
 	/* Do the same, but using random block sizes. */
-	for( ulRandSample = 0; ulRandSample < 0x5ffff; ulRandSample++ )
+	for( ulRandSample = 0; ulRandSample < 0xffffffUL; ulRandSample++ )
 	{
+		xSize1 = rand();
+		xSize2 = rand();
+		xSize3 = rand();
+
 		for( ulIndex = 0; ulIndex < 6; ulIndex++ )
 		{
-			pvUsedBlocks[ 0 ] = pvPortMalloc( rand() );
-			pvUsedBlocks[ 1 ] = pvPortMalloc( rand() );
-			pvUsedBlocks[ 2 ] = pvPortMalloc( rand() );
+			pvUsedBlocks[ 0 ] = pvPortMalloc( xSize1 );
+			pvUsedBlocks[ 1 ] = pvPortMalloc( xSize2 );
+			pvUsedBlocks[ 2 ] = pvPortMalloc( xSize3 );
 
 			vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 0 ] ] );
 			vPortFree( pvUsedBlocks[ ulCombinations[ ulIndex ][ 1 ] ] );
-- 
2.39.5