From 455141636f38ca6c544961c43192b744bc967791 Mon Sep 17 00:00:00 2001
From: yannick fertre <yannick.fertre@st.com>
Date: Fri, 2 Mar 2018 15:59:27 +0100
Subject: [PATCH] arm: dts: stm32: add display for STM32F746 disco board

Enable the display controller, panel & backlight.
Set panel display timings & set the RGB data bus.

Signed-off-by: yannick fertre <yannick.fertre@st.com>
---
 arch/arm/dts/stm32f746-disco.dts | 70 ++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 9e8d2a045c..e47f762e54 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -89,6 +89,37 @@
 		compatible = "st,button1";
 		button-gpio = <&gpioi 11 0>;
 	};
+
+	backlight: backlight {
+		compatible = "gpio-backlight";
+		gpios = <&gpiok 3 0>;
+		status = "okay";
+	};
+
+	panel-rgb@0 {
+		compatible = "simple-panel";
+		backlight = <&backlight>;
+		enable-gpios = <&gpioi 12 0>;
+		status = "okay";
+
+		display-timings {
+			timing@0 {
+				clock-frequency = <9000000>;
+				hactive = <480>;
+				vactive = <272>;
+				hfront-porch = <2>;
+				hback-porch = <2>;
+				hsync-len = <41>;
+				vfront-porch = <2>;
+				vback-porch = <2>;
+				vsync-len = <10>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <1>;
+			};
+		};
+	};
 };
 
 &clk_hse {
@@ -183,6 +214,40 @@
 			  slew-rate = <2>;
 		};
 	};
+
+	ltdc_pins: ltdc@0 {
+		pins {
+			pinmux = <STM32F746_PE4_FUNC_LCD_B0>,
+			       <STM32F746_PG12_FUNC_LCD_B4>,
+			       <STM32F746_PI9_FUNC_LCD_VSYNC>,
+			       <STM32F746_PI10_FUNC_LCD_HSYNC>,
+			       <STM32F746_PI14_FUNC_LCD_CLK>,
+			       <STM32F746_PI15_FUNC_LCD_R0>,
+			       <STM32F746_PJ0_FUNC_LCD_R1>,
+			       <STM32F746_PJ1_FUNC_LCD_R2>,
+			       <STM32F746_PJ2_FUNC_LCD_R3>,
+			       <STM32F746_PJ3_FUNC_LCD_R4>,
+			       <STM32F746_PJ4_FUNC_LCD_R5>,
+			       <STM32F746_PJ5_FUNC_LCD_R6>,
+			       <STM32F746_PJ6_FUNC_LCD_R7>,
+			       <STM32F746_PJ7_FUNC_LCD_G0>,
+			       <STM32F746_PJ8_FUNC_LCD_G1>,
+			       <STM32F746_PJ9_FUNC_LCD_G2>,
+			       <STM32F746_PJ10_FUNC_LCD_G3>,
+			       <STM32F746_PJ11_FUNC_LCD_G4>,
+			       <STM32F746_PJ13_FUNC_LCD_B1>,
+			       <STM32F746_PJ14_FUNC_LCD_B2>,
+			       <STM32F746_PJ15_FUNC_LCD_B3>,
+			       <STM32F746_PK0_FUNC_LCD_G5>,
+			       <STM32F746_PK1_FUNC_LCD_G6>,
+			       <STM32F746_PK2_FUNC_LCD_G7>,
+			       <STM32F746_PK4_FUNC_LCD_B5>,
+			       <STM32F746_PK5_FUNC_LCD_B6>,
+			       <STM32F746_PK6_FUNC_LCD_B7>,
+			       <STM32F746_PK7_FUNC_LCD_DE>;
+			slew-rate = <2>;
+		};
+	};
 };
 
 &usart1 {
@@ -250,3 +315,8 @@
 	bus-width = <4>;
 	max-frequency = <25000000>;
 };
+
+&ltdc {
+	status = "okay";
+	pinctrl-0 = <&ltdc_pins>;
+};
-- 
2.39.5