From 4fae48e8a955728471e02db38195294940396f04 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 14 Sep 2015 13:34:45 +0800 Subject: [PATCH] imx: mx7dsabresd set wdog SRS bit We use trigger pmic reset to reset the board, so set bit SRS to disable internal WDOG_RESET_B_DEB to make reset stable. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Adrian Alonso Tested-by: Fabio Estevam --- board/freescale/mx7dsabresd/mx7dsabresd.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index d163bee20f..6d88573464 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -499,6 +499,8 @@ int power_init_board(void) int board_late_init(void) { + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif @@ -509,7 +511,13 @@ int board_late_init(void) imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); - set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR); + set_wdog_reset(wdog); + + /* + * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), + * since we use PMIC_PWRON to reset the board. + */ + clrsetbits_le16(&wdog->wcr, 0, 0x10); return 0; } -- 2.39.5