From 5d5d44e71787014b409eca6714229d3357c6c000 Mon Sep 17 00:00:00 2001 From: stroese Date: Thu, 20 Mar 2003 15:32:59 +0000 Subject: [PATCH] Patch by Stefan Roese , 20 Mar 2003. --- CHANGELOG | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 18613a82a5..c7a2caca1a 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,12 @@ Changes since U-Boot 0.2.2: ====================================================================== +* Patch by Stefan Roese, 20 Mar 2003: + - CPCI4052 update (support for revision 3). + - Set edge conditioning circuitry on PPC405GPr for compatibility + to existing PPC405GP designs. + - Clip udiv to 5 bits on PPC405 (serial.c). + * Avoid flicker on the TRAB's VFD by synchronizing the enable with the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100 boards, version 153 for Rev. 200 boards). @@ -82,9 +88,9 @@ Changes since U-Boot 0.2.2: lubbock.c - fix init funcs to return proper value * Patch by Kenneth Johansson, 26 Feb 2003: - - Fixed off by one in RFTA calculation. + - Fixed off by one in RFTA calculation. - No need to abort when LDF is lower than we can program it's only - minimum timing so clamp it to what we can do. + minimum timing so clamp it to what we can do. - Takes function pointer to function for reading the spd_nvram. Usefull for faking data or hardcode a module without the nvram. - fix other user for above change -- 2.39.5