From 5ee236a3eae42e49a82b668a368a7d7673da1bca Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2015 11:03:36 +0200 Subject: [PATCH] ARM: zynq: DT: Cleanup address-cells and size-cells Remove unneeded address-cells form intc node because it is already setup in parent node. Add missing address-cells and size-cells to eth node to be shared for every platform DTSes. Signed-off-by: Michal Simek --- arch/arm/dts/zynq-7000.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 61256ee423..276aa75097 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -127,7 +127,6 @@ intc: interrupt-controller@f8f01000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; interrupt-controller; reg = <0xF8F01000 0x1000>, <0xF8F00100 0x100>; @@ -198,6 +197,8 @@ interrupts = <0 22 4>; clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; clock-names = "pclk", "hclk", "tx_clk"; + #address-cells = <1>; + #size-cells = <0>; }; gem1: ethernet@e000c000 { @@ -207,6 +208,8 @@ interrupts = <0 45 4>; clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; clock-names = "pclk", "hclk", "tx_clk"; + #address-cells = <1>; + #size-cells = <0>; }; sdhci0: sdhci@e0100000 { -- 2.39.5