From 5fdea9ff00e316659db0056bf43b1faec6aa1d09 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 13 Dec 2016 17:57:01 +0100 Subject: [PATCH] arm: dts: imx6qdl-icore-rqs: Add I2C node's Add I2C nodes for Engicam i.CoreM6 RQS modules. Cc: Stefano Babic Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 41 +++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 343ab35d84..2aaa6e4a87 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -48,6 +48,26 @@ }; }; +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; @@ -63,6 +83,27 @@ }; &iomuxc { + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; + pinctrl_uart4: uart4grp { fsl,pins = < MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -- 2.39.5