From 69b6a796f7a7cf2a7946e07e32346bf5595829d5 Mon Sep 17 00:00:00 2001 From: Saksham Jain Date: Wed, 23 Mar 2016 16:24:41 +0530 Subject: [PATCH] crypto/fsl: Correct 64-bit write when MMU disabled When MMU is disabled, 64-bit write must be aligned at 64-bit boundary. Becaue the memory location is not guaranteed to be 64-bit aligned, the 64-bit write needs to be split into two 32-bit writes to avoid the alignment exception. Signed-off-by: Aneesh Bansal Signed-off-by: Saksham Jain Reviewed-by: York Sun --- drivers/crypto/fsl/desc_constr.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/fsl/desc_constr.h b/drivers/crypto/fsl/desc_constr.h index 4ea93b03a2..7dad753981 100644 --- a/drivers/crypto/fsl/desc_constr.h +++ b/drivers/crypto/fsl/desc_constr.h @@ -112,10 +112,9 @@ static inline void append_ptr(u32 *desc, dma_addr_t ptr) #ifdef CONFIG_PHYS_64BIT /* The Position of low and high part of 64 bit address * will depend on the endianness of CAAM Block */ - union ptr_addr_t ptr_addr; - ptr_addr.m_halfs.high = (u32)(ptr >> 32); - ptr_addr.m_halfs.low = (u32)ptr; - *offset = ptr_addr.m_whole; + union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset; + ptr_addr->m_halfs.high = (u32)(ptr >> 32); + ptr_addr->m_halfs.low = (u32)ptr; #else *offset = ptr; #endif -- 2.39.5