From 753fc2ebf98a5112fd1dea4ea0806548c741beaf Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sun, 21 Aug 2011 23:29:52 +0200 Subject: [PATCH] MX5: mx51evk: make use of GPIO framework Signed-off-by: Stefano Babic --- board/freescale/mx51evk/mx51evk.c | 18 +++++------------- include/configs/mx51evk.h | 1 + 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index fd7342f112..94ea1f2905 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -180,7 +181,6 @@ static void setup_iomux_spi(void) static void power_init(void) { unsigned int val; - unsigned int reg; struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; /* Write needed to Power Gate 2 register */ @@ -249,13 +249,7 @@ static void power_init(void) pmic_reg_write(REG_MODE_1, val); udelay(200); - reg = readl(GPIO2_BASE_ADDR + 0x0); - reg &= ~0x4000; /* Lower reset line */ - writel(reg, GPIO2_BASE_ADDR + 0x0); - - reg = readl(GPIO2_BASE_ADDR + 0x4); - reg |= 0x4000; /* configure GPIO lines as output */ - writel(reg, GPIO2_BASE_ADDR + 0x4); + gpio_direction_output(46, 0); /* Reset the ethernet controller over GPIO */ writel(0x1, IOMUXC_BASE_ADDR + 0x0AC); @@ -267,9 +261,7 @@ static void power_init(void) udelay(500); - reg = readl(GPIO2_BASE_ADDR + 0x0); - reg |= 0x4000; - writel(reg, GPIO2_BASE_ADDR + 0x0); + gpio_set_value(46, 1); } #ifdef CONFIG_FSL_ESDHC @@ -278,9 +270,9 @@ int board_mmc_getcd(u8 *cd, struct mmc *mmc) struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) - *cd = readl(GPIO1_BASE_ADDR) & 0x01; + *cd = gpio_get_value(0); else - *cd = readl(GPIO1_BASE_ADDR) & 0x40; + *cd = gpio_get_value(6); return 0; } diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 3f2aca1bf3..7d05dc8429 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -60,6 +60,7 @@ */ #define CONFIG_MXC_UART #define CONFIG_SYS_MX51_UART1 +#define CONFIG_MXC_GPIO /* * SPI Configs -- 2.39.5