From 76afbbcda6ab1c96b4cf6bcd57128e1fe0559db8 Mon Sep 17 00:00:00 2001 From: wdenk Date: Mon, 10 Jun 2002 16:09:10 +0000 Subject: [PATCH] Initial revision --- board/siemens/SCM/u-boot.lds | 118 +++++++++++++++++++++++++++++++++++ board/siemens/common/fpga.h | 53 ++++++++++++++++ 2 files changed, 171 insertions(+) create mode 100644 board/siemens/SCM/u-boot.lds create mode 100644 board/siemens/common/fpga.h diff --git a/board/siemens/SCM/u-boot.lds b/board/siemens/SCM/u-boot.lds new file mode 100644 index 0000000000..5df4cdb321 --- /dev/null +++ b/board/siemens/SCM/u-boot.lds @@ -0,0 +1,118 @@ +/* + * (C) Copyright 2001 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + cpu/mpc8260/start.o (.text) + *(.text) + common/environment.o(.text) + *(.fixup) + *(.got1) + . = ALIGN(16); + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} + diff --git a/board/siemens/common/fpga.h b/board/siemens/common/fpga.h new file mode 100644 index 0000000000..2de25b0146 --- /dev/null +++ b/board/siemens/common/fpga.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2002 + * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef _FPGA_H_ +#define _FPGA_H_ + +#define FPGA_INIT_IS_HIGH 0 +#define FPGA_INIT_SET_HIGH 1 +#define FPGA_INIT_SET_LOW 2 +#define FPGA_PROG_SET_HIGH 3 +#define FPGA_PROG_SET_LOW 4 +#define FPGA_DONE_IS_HIGH 5 +#define FPGA_READ_MODE 6 +#define FPGA_LOAD_MODE 7 +#define FPGA_GET_ID 8 +#define FPGA_INIT_PORTS 9 + +#define FPGA_NAME_LEN 8 +typedef struct { + char name[FPGA_NAME_LEN]; + ulong conf_base; + uint init_mask; + uint prog_mask; + uint done_mask; +} fpga_t; + +extern fpga_t fpga_list[]; +extern int fpga_count; + +ulong fpga_control (fpga_t* fpga, int cmd); + +#endif /* _FPGA_H_ */ -- 2.39.5