From 7cacb64a354a1d996ba55e5e35b95f111f00648d Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Sun, 18 Oct 2015 20:03:53 +0800 Subject: [PATCH] nios2: convert dma_alloc_coherent to use malloc_cache_aligned Convert dma_alloc_coherent to use memalign. Signed-off-by: Thomas Chou Reviewed-by: Marek Vasut --- arch/nios2/include/asm/dma-mapping.h | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h index 1350e3b96f..1562d35f0d 100644 --- a/arch/nios2/include/asm/dma-mapping.h +++ b/arch/nios2/include/asm/dma-mapping.h @@ -1,23 +1,24 @@ #ifndef __ASM_NIOS2_DMA_MAPPING_H #define __ASM_NIOS2_DMA_MAPPING_H -/* dma_alloc_coherent() return cache-line aligned allocation which is mapped +#include +#include + +/* + * dma_alloc_coherent() return cache-line aligned allocation which is mapped * to uncached io region. - * - * IO_REGION_BASE should be defined in board config header file - * 0x80000000 for nommu, 0xe0000000 for mmu */ - static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) { - void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE); + unsigned long addr = (unsigned long)malloc_cache_aligned(len); + if (!addr) - return 0; - flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE); - *handle = ((unsigned long)addr + - (CONFIG_SYS_DCACHELINE_SIZE - 1)) & - ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE); - return (void *)(*handle | IO_REGION_BASE); -} + return NULL; + + invalidate_dcache_range(addr, addr + len); + if (handle) + *handle = addr; + return ioremap(addr, len); +} #endif /* __ASM_NIOS2_DMA_MAPPING_H */ -- 2.39.5