From 7ce85318cfff5fd82a059131761559cba7fef309 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Thu, 3 May 2018 20:34:49 +0530 Subject: [PATCH] arm: mach-omap2: cache: Explicitly enable I cache omap-common cache enabling sequence relies on cpu_init_cp15() (inside start.S) for enabling I-caches. But cpu_init_cp15() can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So enable I-caches if not enabled already. Debugged-by: Jean-Jacques Hiblot Tested-by: Steve Kipisz Signed-off-by: Lokesh Vutla Tested-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini --- arch/arm/mach-omap2/omap-cache.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c index b37163a4f3..975ee1b020 100644 --- a/arch/arm/mach-omap2/omap-cache.c +++ b/arch/arm/mach-omap2/omap-cache.c @@ -44,7 +44,11 @@ DECLARE_GLOBAL_DATA_PTR; void enable_caches(void) { - /* Enable D-cache. I-cache is already enabled in start.S */ + + /* Enable I cache if not enabled */ + if (!icache_status()) + icache_enable(); + dcache_enable(); } -- 2.39.5