From 8f513f039aab589d8e4583743a7560eca41cfad9 Mon Sep 17 00:00:00 2001 From: kc8apf Date: Tue, 20 Jan 2009 03:49:31 +0000 Subject: [PATCH] Fix support for ADuC702x flash. Courtesy of Michael Ashton git-svn-id: svn://svn.berlios.de/openocd/trunk@1343 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- doc/openocd.texi | 4 +- src/flash/aduc702x.c | 360 +++++++++++++++++++++++++++------ src/target/target/aduc702x.cfg | 6 +- 3 files changed, 305 insertions(+), 65 deletions(-) diff --git a/doc/openocd.texi b/doc/openocd.texi index 1866fa0e..98dbdb9b 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2240,8 +2240,8 @@ Use the standard str9 driver for programming. @xref{STR9 specific commands}. @subsubsection aduc702x options @cindex aduc702x options -@b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}> -@*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}. +@b{flash bank aduc702x} 0 0 0 0 <@var{target#}> +@*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout). @subsection mFlash configuration @cindex mFlash configuration diff --git a/src/flash/aduc702x.c b/src/flash/aduc702x.c index 0df57479..f9142348 100644 --- a/src/flash/aduc702x.c +++ b/src/flash/aduc702x.c @@ -1,6 +1,7 @@ /*************************************************************************** * Copyright (C) 2008 by Kevin McGuire * * Copyright (C) 2008 by Marcel Wijlaars * + * Copyright (C) 2009 by Michael Ashton * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -23,7 +24,7 @@ #endif #include "replacements.h" - +#include "time_support.h" #include "flash.h" #include "target.h" #include "log.h" @@ -40,9 +41,14 @@ int aduc702x_register_commands(struct command_context_s *cmd_ctx); int aduc702x_erase(struct flash_bank_s *bank, int first, int last); int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last); int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); +int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); +int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); int aduc702x_probe(struct flash_bank_s *bank); int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size); int aduc702x_protect_check(struct flash_bank_s *bank); +int aduc702x_build_sector_list(struct flash_bank_s *bank); +int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms); +int aduc702x_set_write_enable(target_t *target, int enable); #define ADUC702x_FLASH 0xfffff800 #define ADUC702x_FLASH_FEESTA (0*4) @@ -67,8 +73,8 @@ typedef struct { typedef struct { - unsigned char tmp; -} aduc702x_bank; + working_area_t *write_algorithm; +} aduc702x_flash_bank_t; flash_driver_t aduc702x_flash = { @@ -90,26 +96,42 @@ int aduc702x_register_commands(struct command_context_s *cmd_ctx) return ERROR_OK; } -/* flash bank aduc702x 0 0 */ +/* flash bank aduc702x 0 0 0 0 + * The ADC7019-28 devices all have the same flash layout */ int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank) { - aduc702x_bank *nbank; + aduc702x_flash_bank_t *nbank; - if (argc < 6) - { - LOG_WARNING("incomplete flash_bank aduc702x configuration"); - return ERROR_FLASH_BANK_INVALID; - } + nbank = malloc(sizeof(aduc702x_flash_bank_t)); - nbank = malloc(sizeof(aduc702x_bank)); - /* just warn that we are used to normally using 0x80000 */ - if (bank->base != 0x80000) - { - LOG_WARNING("Default base address is 0x80000 on the ADuC7026!"); - } - - nbank->tmp = 1; + bank->base = 0x80000; + bank->size = 0xF800; // top 4k not accessible bank->driver_priv = nbank; + + aduc702x_build_sector_list(bank); + + return ERROR_OK; +} + +int aduc702x_build_sector_list(struct flash_bank_s *bank) +{ + //aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv; + + int i = 0; + u32 offset = 0; + + // sector size is 512 + bank->num_sectors = bank->size / 512; + bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors); + for (i = 0; i < bank->num_sectors; ++i) + { + bank->sectors[i].offset = offset; + bank->sectors[i].size = 512; + offset += bank->sectors[i].size; + bank->sectors[i].is_erased = -1; + bank->sectors[i].is_protected = 0; + } + return ERROR_OK; } @@ -121,45 +143,54 @@ int aduc702x_protect_check(struct flash_bank_s *bank) int aduc702x_erase(struct flash_bank_s *bank, int first, int last) { + //int res; int x; int count; - u32 v; + //u32 v; target_t *target = bank->target; + aduc702x_set_write_enable(target, 1); + /* mass erase */ - if ((first | last) == 0) - { + if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) { LOG_DEBUG("performing mass erase.\n"); - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff); - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3); - target_read_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, &v); - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, v | 0x8); - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06); - for (v = 0x4; v & 0x4; - target_read_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v)); - - if (!(v & 0x1)) + target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff); + target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3); + target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06); + + if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) { - LOG_ERROR("mass erase failed.\n"); - return ERROR_FLASH_SECTOR_NOT_ERASED; + LOG_ERROR("mass erase failed\n"); + aduc702x_set_write_enable(target, 0); + return ERROR_FLASH_OPERATION_FAILED; } + LOG_DEBUG("mass erase successful.\n"); return ERROR_OK; - } + } else { + unsigned long adr; + + count = last - first + 1; + for (x = 0; x < count; ++x) + { + adr = bank->base + ((first + x) * 512); + + target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr); + target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05); + + if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) + { + LOG_ERROR("failed to erase sector at address 0x%08lX\n", adr); + aduc702x_set_write_enable(target, 0); + return ERROR_FLASH_SECTOR_NOT_ERASED; + } + + LOG_DEBUG("erased sector at address 0x%08lX\n", adr); + } + } + + aduc702x_set_write_enable(target, 0); - count = last - first; - for (x = 0; x < count; ++x) - { - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, bank->base + first * 512 + x * 512); - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05); - for (v = 0x4; v & 0x4; target_read_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v)); - if (!(v & 0x1)) - { - LOG_ERROR("erase failed for page address %x\n", bank->base + first * 512 + x * 512); - return ERROR_FLASH_SECTOR_NOT_ERASED; - } - LOG_DEBUG("erased page address %x\n", bank->base + first * 512 + x * 512); - } return ERROR_OK; } @@ -169,34 +200,205 @@ int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last) return ERROR_FLASH_OPERATION_FAILED; } -int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { - int x; - u32 v; + aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv; target_t *target = bank->target; + u32 buffer_size = 7000; + working_area_t *source; + u32 address = bank->base + offset; + reg_param_t reg_params[6]; + armv4_5_algorithm_t armv4_5_info; + int retval = ERROR_OK; - for (x = 0; x < count; x += 2) + /* parameters: + + r0 - address of source data (absolute) + r1 - number of halfwords to be copied + r2 - start address in flash (offset from beginning of flash memory) + r3 - exit code + r4 - base address of flash controller (0xFFFFF800) + + registers: + + r5 - scratch + r6 - set to 2, used to write flash command + + */ + u32 aduc702x_flash_write_code[] = { + //<_start>: + 0xe3a05008, // mov r5, #8 ; 0x8 + 0xe5845004, // str r5, [r4, #4] + 0xe3a06002, // mov r6, #2 ; 0x2 + //: + 0xe1c421b0, // strh r2, [r4, #16] + 0xe0d050b2, // ldrh r5, [r0], #2 + 0xe1c450bc, // strh r5, [r4, #12] + 0xe5c46008, // strb r6, [r4, #8] + //: + 0xe1d430b0, // ldrh r3, [r4] + 0xe3130004, // tst r3, #4 ; 0x4 + 0x1afffffc, // bne 1001c + 0xe2822002, // add r2, r2, #2 ; 0x2 + 0xe2511001, // subs r1, r1, #1 ; 0x1 + 0x0a000001, // beq 1003c + 0xe3130001, // tst r3, #1 ; 0x1 + 0x1afffff3, // bne 1000c + //: + 0xeafffffe // b 1003c + }; + + /* flash write code */ + if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code), + &aduc702x_info->write_algorithm) != ERROR_OK) { - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x); - /* if we able to encounter a single byte instead of a word */ - if ((x + 1) == count) { - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x]); - } - else { - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (buffer[x+1] << 8)); + LOG_WARNING("no working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + }; + + target_write_buffer(target, aduc702x_info->write_algorithm->address, + sizeof(aduc702x_flash_write_code), (u8*)aduc702x_flash_write_code); + + /* memory buffer */ + while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) + { + buffer_size /= 2; + if (buffer_size <= 256) + { + /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */ + if (aduc702x_info->write_algorithm) + target_free_working_area(target, aduc702x_info->write_algorithm); + + LOG_WARNING("no large enough working area available, can't do block memory writes"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - target_write_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02); - for (v = 0x4; v & 0x4; target_read_u32(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v)); - if (!(v & 0x1)) + } + + armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; + armv4_5_info.core_mode = ARMV4_5_MODE_SVC; + armv4_5_info.core_state = ARMV4_5_STATE_ARM; + + init_reg_param(®_params[0], "r0", 32, PARAM_OUT); + init_reg_param(®_params[1], "r1", 32, PARAM_OUT); + init_reg_param(®_params[2], "r2", 32, PARAM_OUT); + init_reg_param(®_params[3], "r3", 32, PARAM_IN); + init_reg_param(®_params[4], "r4", 32, PARAM_OUT); + + while (count > 0) + { + u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; + + target_write_buffer(target, source->address, thisrun_count * 2, buffer); + + buf_set_u32(reg_params[0].value, 0, 32, source->address); + buf_set_u32(reg_params[1].value, 0, 32, thisrun_count); + buf_set_u32(reg_params[2].value, 0, 32, address); + buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800); + + if ((retval = target->type->run_algorithm(target, 0, NULL, 5, + reg_params, aduc702x_info->write_algorithm->address, + aduc702x_info->write_algorithm->address + sizeof(aduc702x_flash_write_code) - 4, + 10000, &armv4_5_info)) != ERROR_OK) { - LOG_ERROR("single write failed for address %x.\n", offset + x); + LOG_ERROR("error executing aduc702x flash write algorithm"); + retval = ERROR_FLASH_OPERATION_FAILED; + break; + } + + if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1) { + retval = ERROR_FLASH_OPERATION_FAILED; + break; + } + + buffer += thisrun_count * 2; + address += thisrun_count * 2; + count -= thisrun_count; + } + + target_free_working_area(target, source); + target_free_working_area(target, aduc702x_info->write_algorithm); + + destroy_reg_param(®_params[0]); + destroy_reg_param(®_params[1]); + destroy_reg_param(®_params[2]); + destroy_reg_param(®_params[3]); + destroy_reg_param(®_params[4]); + + return retval; +} + +/* All-JTAG, single-access method. Very slow. Used only if there is no + * working area available. */ +int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +{ + int x; + u8 b; + target_t *target = bank->target; + + aduc702x_set_write_enable(target, 1); + + for (x = 0; x < count; x += 2) { + // FEEADR = address + target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x); + + // set up data + if ((x + 1) == count) + { + // last byte + target_read_u8(target, offset + x + 1, &b); + } + else + b = buffer[x + 1]; + + target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8)); + + // do single-write command + target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02); + + if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) + { + LOG_ERROR("single write failed for address 0x%08lX\n", (unsigned long)(offset + x)); + aduc702x_set_write_enable(target, 0); return ERROR_FLASH_OPERATION_FAILED; } - LOG_DEBUG("single write for address %x.\n", offset + x); + } + LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x)); + + aduc702x_set_write_enable(target, 0); + return ERROR_OK; } +int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) +{ + int retval; + + /* try using a block write */ + if ((retval = aduc702x_write_block(bank, buffer, offset, count)) != ERROR_OK) + { + if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) + { + /* if block write failed (no sufficient working area), + * use normal (slow) JTAG method */ + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); + + if ((retval = aduc702x_write_single(bank, buffer, offset, count)) != ERROR_OK) + { + LOG_ERROR("slow write failed"); + return ERROR_FLASH_OPERATION_FAILED; + } + } + else if (retval == ERROR_FLASH_OPERATION_FAILED) + { + LOG_ERROR("flash block writing failed"); + return ERROR_FLASH_OPERATION_FAILED; + } + } + + return ERROR_OK; +} + int aduc702x_probe(struct flash_bank_s *bank) { return ERROR_OK; @@ -207,3 +409,37 @@ int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size) snprintf(buf, buf_size, "aduc702x flash driver info" ); return ERROR_OK; } + +/* sets FEEMOD bit 3 + * enable = 1 enables writes & erases, 0 disables them */ +int aduc702x_set_write_enable(target_t *target, int enable) +{ + // don't bother to preserve int enable bit here + target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0); + + return ERROR_OK; +} + +/* wait up to timeout_ms for controller to not be busy, + * then check whether the command passed or failed. + * + * this function sleeps 1ms between checks (after the first one), + * so in some cases may slow things down without a usleep after the first read */ +int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms) +{ + u8 v = 4; + + long long endtime = timeval_ms() + timeout_ms; + while (1) { + target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v); + if ((v & 4) == 0) break; + alive_sleep(1); + if (timeval_ms() >= endtime) break; + } + + if (v & 2) return ERROR_FAIL; + // if a command is ignored, both the success and fail bits may be 0 + else if ((v & 3) == 0) return ERROR_FAIL; + else return ERROR_OK; +} + diff --git a/src/target/target/aduc702x.cfg b/src/target/target/aduc702x.cfg index 35f5ff32..ef1beb78 100644 --- a/src/target/target/aduc702x.cfg +++ b/src/target/target/aduc702x.cfg @@ -39,8 +39,12 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME [format "%s.cpu" $_CHIPNAME] target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME +# allocate the entire SRAM as working area +$_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000 + ## flash configuration -flash bank aduc702x 0x80000 0x10000 2 2 0 +# only target number is needed +flash bank aduc702x 0 0 0 0 0 ## If you use the watchdog, the following code makes sure that the board ## doesn't reboot when halted via JTAG. Yes, on the older generation -- 2.39.5