From 928f3248b3e81a9fdaa818cf3aa02e5daef7015d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 25 Aug 2016 21:03:41 +0900 Subject: [PATCH] ARM: uniphier: support system reset functionality for PSCI This supports the system reset via PSCI for ARMv7 SoCs. Because the system reset is not supported on PSCI 0.1, let's define CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there is no CONFIG to enable it in U-Boot for now.) Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/arm32/psci.c | 5 +++++ arch/arm/mach-uniphier/reset.c | 14 ++++++++++++-- include/configs/uniphier.h | 1 + 3 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c index 633a3e0840..e6682657be 100644 --- a/arch/arm/mach-uniphier/arm32/psci.c +++ b/arch/arm/mach-uniphier/arm32/psci.c @@ -151,3 +151,8 @@ int __secure psci_cpu_on(u32 function_id, u32 cpuid, u32 entry_point) return PSCI_RET_SUCCESS; } + +void __secure psci_system_reset(u32 function_id) +{ + reset_cpu(0); +} diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c index b5825bc0c7..43e27d12c3 100644 --- a/arch/arm/mach-uniphier/reset.c +++ b/arch/arm/mach-uniphier/reset.c @@ -1,15 +1,25 @@ /* - * Copyright (C) 2012-2015 Masahiro Yamada + * Copyright (C) 2012-2014 Panasonic Corporation + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ #include #include +#include #include "sc-regs.h" -void reset_cpu(unsigned long ignored) +/* If PSCI is enabled, this is used for SYSTEM_RESET function */ +#ifdef CONFIG_ARMV7_PSCI +#define __SECURE __secure +#else +#define __SECURE +#endif + +void __SECURE reset_cpu(unsigned long ignored) { u32 tmp; diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 0f5b20ff48..184704bbf8 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -12,6 +12,7 @@ #define __CONFIG_UNIPHIER_COMMON_H__ #define CONFIG_ARMV7_PSCI +#define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 -- 2.39.5