From 9d07cccf5ed13e57354b9f131c7d7db9f8c7b0d2 Mon Sep 17 00:00:00 2001 From: richardbarry Date: Mon, 17 Oct 2011 13:17:14 +0000 Subject: [PATCH] First commit with TriCore port and demo - still a work in progress. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1620 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- Demo/TriCore_TC1782_TriBoard_GCC/.cproject | 1041 +++++++++++++++++ Demo/TriCore_TC1782_TriBoard_GCC/.project | 85 ++ .../.ude/.target/TriBoard_TC1782.cfg | 58 + .../.ude/UDEDefEclipseWorkspace.wsx | 845 +++++++++++++ .../CreateProjectDirectoryStructure.bat | 62 + .../RTOSDemo/FreeRTOSConfig.h | 119 ++ .../RTOSDemo/ParTest.c | 95 ++ .../RTOSDemo/ThirdPartyCode/cpufreq.c | 162 +++ .../RTOSDemo/main.c | 568 +++++++++ .../RTOSDemo/serial.c | 250 ++++ Demo/TriCore_TC1782_TriBoard_GCC/ld/iRAM.ld | 655 +++++++++++ Demo/TriCore_TC1782_TriBoard_GCC/ld/iROM.ld | 655 +++++++++++ .../models/.parts/ldf_configuration.lm | 8 + .../models/TriBoard-TC1782.mdm | 19 + .../models/iRAM.lm | 124 ++ .../models/iROM.lm | 124 ++ 16 files changed, 4870 insertions(+) create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/.cproject create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/.project create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/.ude/.target/TriBoard_TC1782.cfg create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/.ude/UDEDefEclipseWorkspace.wsx create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/CreateProjectDirectoryStructure.bat create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ThirdPartyCode/cpufreq.c create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/ld/iRAM.ld create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/ld/iROM.ld create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/models/.parts/ldf_configuration.lm create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/models/TriBoard-TC1782.mdm create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/models/iRAM.lm create mode 100644 Demo/TriCore_TC1782_TriBoard_GCC/models/iROM.lm diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/.cproject b/Demo/TriCore_TC1782_TriBoard_GCC/.cproject new file mode 100644 index 000000000..d1d2fe9b0 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/.cproject @@ -0,0 +1,1041 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/.project b/Demo/TriCore_TC1782_TriBoard_GCC/.project new file mode 100644 index 000000000..ee691981b --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/.project @@ -0,0 +1,85 @@ + + + FreeRTOS_Demo + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/FreeRTOS_Demo/iRAM} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + com.rt.hightec.buildsystem.global.project.nature + com.rt.hightec.buildsystem.tricore.nature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.rt.hightec.modeling.linker.core.project.nature + + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/.ude/.target/TriBoard_TC1782.cfg b/Demo/TriCore_TC1782_TriBoard_GCC/.ude/.target/TriBoard_TC1782.cfg new file mode 100644 index 000000000..69c77d166 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/.ude/.target/TriBoard_TC1782.cfg @@ -0,0 +1,58 @@ +[Main] +Signature=UDE_TARGINFO_2.0 +MCUs=Controller0 +Description=Triboard with TC1782 (DAS) +Architecture=TriCore +Vendor=Infineon +Board=TC1782 Starterkit + +[Controller0] +Family=TriCore +Type=TC1782 +MemDevs= +Enabled=1 +ExtClock=20000 +IntClock=150000 + +[Controller0.Core] +Protocol=TC_JTAG +Enabled=1 + +[Controller0.Core.LoadedAddOn] +UDEMemtool=1 + +[Controller0.LicenseCheck] +LicenseCheckMode=33 + +[Controller0.Core.TcCoreTargIntf] +PortType=DAS +MaxJtagClk=5000 + +[Controller0.PCP] +Master=Core +Enabled=0 + +[Controller0.PFLASH] +Enabled=1 +Descrition=2,5MB Internal Flash +Range0Start=0xA0000000 +Range0Size=0x280000 +AdvancedRemap=True +NumOfRemapRanges=2 +RemapRange0=0x80000000,0x00280000 +RemapRange1=0xA0000000,0x00280000 +AutoErase=True +AutoVerify=True +EnableMemtoolByDefault=1 + +[Controller0.DFLASH] +Enabled=1 +AutoErase=True +AutoVerify=True +EnableMemtoolByDefault=1 + +[Controller0.Core.TcCoreTargIntf.OnStart] +ExecInitCmds=0 +[Controller0.Core.TcCoreTargIntf.OnHalt] +ExecInitCmds=0 + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/.ude/UDEDefEclipseWorkspace.wsx b/Demo/TriCore_TC1782_TriBoard_GCC/.ude/UDEDefEclipseWorkspace.wsx new file mode 100644 index 000000000..ccabbb39d --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/.ude/UDEDefEclipseWorkspace.wsx @@ -0,0 +1,845 @@ + + + UDEDefEclipseWorkspace.wsx005vQTv/gAAAQAQAAIAoAgKAAAAAwAAAAAAPwAAAAAAAAAEAAAAAgAAAAAAAAAAAAAAAAAAAA==3.009.10.2011 23:28:09:000 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 009.10.2011 23:28:11:619nAAAAD8AAYAAAAAAAAAAAAAAAAAAAAAAAQAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA +AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA +AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA1515524294967295100Samsung SCX-3200 Series..\..\..\..\Program Files (x86)\pls\UDE 3.0\StdLibrary.mso{7c641d47-534f-4ed9-9070-088b60a3befa}..\..\..\..\Users\Public\Documents\pls\UDE 3.0The script contains a collection of macros to save memory content into different file formats +and fill target memory rangesV:\UDE\AddOns\Macro\MacroLibrary\StdMacros1.dsm' +' $Header: /Ude/AddOns/Macro/MacroLibrary/StdMacros.dsm 3 30.04.04 9:34 Weisses $ +'_______________________________________________________ +' +' universal debug engine +' +' Standard command line macros - part 1 +' +' pls Development Tools 1999-2004 +' +' 28.04.04 SW correction for UDE 1.10 +' 03.06.03 SW initial version +'_______________________________________________________ + +'_______________________________________________________ +' +' UnAss command line function +' +' generates disassembly file +' +' command line UnAss output-file range1 [range2] [range3] ..... +' range description: +' C:<startaddress>,<length> or - code +' DB:<startaddress>,<length> or - data byte +' DW:<startaddress>,<length> or - data word +' DD:<startaddress>,<length> or - data dword +'_______________________________________________________ + +Sub UnAss(File,ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + If IsNumeric(File) Then + MsgBox "File parameter wrong - " & File + Exit Sub + End If + DisASMObj.OutputPath = CStr(File) + bRetVal = DisASMObj.CreateStream(True,"UDE Disassembler output of current Program",False) + If bRetVal = True Then + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + For Range = 0 To RangeCnt -1 + KindOfRange = CStr(ParameterObj.Parameter(ParamIndex)) + KindOfRange = UCase(KindOfRange) + Address = CLng(ParameterObj.Parameter(ParamIndex +1)) + Length = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + If IsNumeric(KindOfRange) Then + If KindOfRange = 12 Then + DisASMObj.AddRange Address,Length,1 + ElseIf KindOfRange = 219 Then + DisASMObj.AddRange Address,Length,2 + ElseIf KindOfRange = 221 Then + DisASMObj.AddRange Address,Length,4 + Else + MsgBox "Invalid range type " & KindOfRange & "of range " & Range +1 + Exit Sub + End If + Else + If KindOfRange = "C" Then + DisASMObj.AddRange Address,Length,1 + ElseIf KindOfRange = "DB" Then + DisASMObj.AddRange Address,Length,2 + ElseIf KindOfRange = "DW" Then + DisASMObj.AddRange Address,Length,3 + ElseIf KindOfRange = "DD" Then + DisASMObj.AddRange Address,Length,4 + Else + MsgBox "Invalid range type " & KindOfRange & "of range " & Range +1 + Exit Sub + End If + End If + Next + DisASMObj.HexFileModeFlag = False + DisASMObj.ListModeFlag = False + DisASMObj.WriteAllRanges(False) + End If + +End Sub + +'_______________________________________________________ +' +' SaveHEX command line function +' +' generates intel-HEX file +' +' command line SaveHex output-file range1 [range2] [range3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub SaveHEX(File,ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + If IsNumeric(File) Then + MsgBox "File parameter wrong - " & File + Exit Sub + End If + DisASMObj.OutputPath = CStr(File) + bRetVal = DisASMObj.CreateStream(True,"UDE generated intel-Hex file of current Program",False) + If bRetVal = True Then + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 2 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/2 + ParamIndex = 0 + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)) + ParamIndex = ParamIndex +2 + DisASMObj.AddRange Address,Length,0 + Next + DisASMObj.HexFileModeFlag = True + DisASMObj.WriteAllRanges(False) + End If + +End Sub + +'_______________________________________________________ +' +' FillByte command line function +' +' fills memory range with byte pattern +' +' command line FillByte range1,pattern1 [range2,pattern2] [range3,pattern3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub FillByte(ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + set udearrayobj = debugger.ByteArrayObj(1) + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)) + Pattern = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + udearrayobj.Resize(Length) + udearrayobj.Fill(Pattern) + debugger.Write Address,udearrayobj + Next + +End Sub + +'_______________________________________________________ +' +' FillWord command line function +' +' fills memory range with word pattern +' +' command line FillWord range1,pattern1 [range2,pattern2] [range3,pattern3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub FillWord(ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + set udearrayobj = debugger.WordArrayObj(1) + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)/2) + Pattern = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + udearrayobj.Resize(Length) + udearrayobj.Fill(Pattern) + debugger.Write Address,udearrayobj + Next + +End Sub + +'_______________________________________________________ +' +' FillDWord command line function +' +' fills memory range with dword pattern +' +' command line FillDWord range1,pattern1 [range2,pattern2] [range3,pattern3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub FillDWord(ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + set udearrayobj = debugger.DWordArrayObj(1) + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)/4) + Pattern = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + udearrayobj.Resize(Length) + udearrayobj.Fill(Pattern) + debugger.Write Address,udearrayobj + Next + +End Sub63VBScript24.11.2006 14:43:20:0001WS_CORE_DUOMacro_17_10_11_12_00_09_010Execute UnAss ..Macro UnAssExecute macro UnAss0210Execute SaveHEX ..Macro SaveHEXExecute macro SaveHEX0210Execute FillByte ..Macro FillByteExecute macro FillByte0110Execute FillWord ..Macro FillWordExecute macro FillWord0110Execute FillDWord ..Macro FillDWordExecute macro FillDWord015011.10.2011 21:18:03:9450x000000001351684294967295009.10.2011 23:28:11:73713926442949672951009.10.2011 23:28:17:413..\RTOSDemo\main.c13516842949672955017.10.2011 11:43:03:982code <0x80006000-0x800063FF>1351684294967295117.10.2011 11:45:47:6021351684294967295..\RTOSDemo\FreeRTOS_Source\tasks.c17.10.2011 11:45:58:240..\RTOSDemo\FreeRTOS_Source\portable\GCC\TriCore_1782\port.c13516842949672952317.10.2011 11:48:11:741..\RTOSDemo\Common_Demo_Source\flash.c135168429496729540109.10.2011 23:54:28:219288019200135168429496729500000000109.10.2011 23:57:15:537<_ExtentX type="bin" size="8">AAAAAA==<_ExtentY type="bin" size="8">AAAAAA==<_StockProps type="bin" size="8">AAAAAA==AgAAAA==UABDAAAAUABDAAAAAAAAAA==YAAAAA==RgB1AG4AYwB0AGkAbwBuAAAARgB1AG4AYwB0AGkAbwBuAAAAAAAAAA==QAYAAA==13516842949672950010000x00x00000000x00x00000000010000x00x00000000x00x00000000010001120100000001429496729542949672954294967295429496729542949672954294967295429496729542949672954294967295429496729542949672951..\iROM\FreeRTOS_Demo.elfSoftware;enabled;0;disabled;'vLEDFlashTask {C:\E\Dev\FreeRTOS\WorkingCopy\Demo\TriCore_TC1782_TriBoard_GCC\RTOSDemo\Common_Demo_Source\flash.c} .105';flash.c;1;0;;$disabled; ;disabled; ;101100000verify.txt0000005..\RTOSDemo\main.ccode <0x80006000-0x800063FF>..\RTOSDemo\FreeRTOS_Source\tasks.c..\RTOSDemo\FreeRTOS_Source\portable\GCC\TriCore_1782\port.c..\RTOSDemo\Common_Demo_Source\flash.c.target\TriBoard_TC1782.cfg17.10.2011 12:00:09:000 diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/CreateProjectDirectoryStructure.bat b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/CreateProjectDirectoryStructure.bat new file mode 100644 index 000000000..92ad175bd --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/CreateProjectDirectoryStructure.bat @@ -0,0 +1,62 @@ +REM This file should be executed from the command line prior to the first +REM build. It will be necessary to refresh the Eclipse project once the +REM .bat file has been executed (normally just press F5 to refresh). + +REM Copies all the required files from their location within the standard +REM FreeRTOS directory structure to under the Eclipse project directory. +REM This permits the Eclipse project to be used in 'managed' mode and without +REM having to setup any linked resources. + +REM Standard paths +SET FREERTOS_SOURCE=..\..\..\Source +SET COMMON_SOURCE=..\..\Common\minimal +SET COMMON_INCLUDE=..\..\Common\include + +REM Have the files already been copied? +IF EXIST FreeRTOS_Source Goto END + + REM Create the required directory structure. + MD FreeRTOS_Source + MD FreeRTOS_Source\include + MD FreeRTOS_Source\portable\GCC + MD FreeRTOS_Source\portable\GCC\TriCore_1782 + MD FreeRTOS_Source\portable\MemMang + MD Common_Demo_Source + MD Common_Demo_Source\include + + REM Copy the core kernel files into the SDK projects directory + copy %FREERTOS_SOURCE%\tasks.c FreeRTOS_Source + copy %FREERTOS_SOURCE%\queue.c FreeRTOS_Source + copy %FREERTOS_SOURCE%\list.c FreeRTOS_Source + copy %FREERTOS_SOURCE%\timers.c FreeRTOS_Source + + REM Copy the common header files into the SDK projects directory + copy %FREERTOS_SOURCE%\include\*.* FreeRTOS_Source\include + + REM Copy the portable layer files into the projects directory + copy %FREERTOS_SOURCE%\portable\GCC\TriCore_1782\*.* FreeRTOS_Source\portable\GCC\TriCore_1782 + + REM Copy the basic memory allocation files into the SDK projects directory + copy %FREERTOS_SOURCE%\portable\MemMang\heap_2.c FreeRTOS_Source\portable\MemMang + + REM Copy the files that define the common demo tasks. + copy %COMMON_SOURCE%\dynamic.c Common_Demo_Source + copy %COMMON_SOURCE%\BlockQ.c Common_Demo_Source + copy %COMMON_SOURCE%\death.c Common_Demo_Source + copy %COMMON_SOURCE%\blocktim.c Common_Demo_Source + copy %COMMON_SOURCE%\semtest.c Common_Demo_Source + copy %COMMON_SOURCE%\PollQ.c Common_Demo_Source + copy %COMMON_SOURCE%\GenQTest.c Common_Demo_Source + copy %COMMON_SOURCE%\QPeek.c Common_Demo_Source + copy %COMMON_SOURCE%\recmutex.c Common_Demo_Source + copy %COMMON_SOURCE%\flop.c Common_Demo_Source + copy %COMMON_SOURCE%\flash.c Common_Demo_Source + copy %COMMON_SOURCE%\comtest.c Common_Demo_Source + copy %COMMON_SOURCE%\TimerDemo.c Common_Demo_Source + copy %COMMON_SOURCE%\countsem.c Common_Demo_Source + copy %COMMON_SOURCE%\integer.c Common_Demo_Source + + REM Copy the common demo file headers. + copy %COMMON_INCLUDE%\*.h Common_Demo_Source\include + +: END diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h new file mode 100644 index 000000000..951f17635 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h @@ -0,0 +1,119 @@ +/* + FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + */ + +/*----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +/* CPU is actually 150MHz but FPIDIV is 1 meaning divide by 2. */ +#define configCPU_CLOCK_HZ ( ( unsigned long ) 150000000UL ) +#define configPERIPHERAL_CLOCK_HZ ( ( unsigned long ) configCPU_CLOCK_HZ / 2UL ) +#define configTICK_RATE_HZ ( ( portTickType ) 1000UL ) +#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 32 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configCHECK_FOR_STACK_OVERFLOW 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* Mutual Exclusion. */ +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_MUTEXES 1 + +/* Timer functionality. */ +#define configUSE_TIMERS 0 +#define configTIMER_TASK_PRIORITY ( 4 ) +#define configTIMER_QUEUE_LENGTH ( 2 ) + +/* Set the following definitions to 1 to include the API function, or zero + to exclude the API function. + We use --gc-sections when linking, so there is no harm is setting all of these to 1 */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 + +#define BLOCKQ_1 0 + +#define portCLEANUP_TCB( pxTCB ) vPortReclaimCSA( ( unsigned portBASE_TYPE *) ( pxTCB ) ) + +#endif /* FREERTOS_CONFIG_H */ + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c new file mode 100644 index 000000000..ddf4d3eec --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c @@ -0,0 +1,95 @@ +/* + FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* Scheduler Includes. */ +#include "FreeRTOS.h" + +/* Demo Includes. */ +#include "partest.h" + +/* Machine Includes. */ +#include +/*---------------------------------------------------------------------------*/ + +void vParTestInitialise( void ) +{ + /* The TriBoard TC1782 v2.1 has 8 LEDs connected to GPIO5. */ + P5_IOCR0.reg = 0xC0C0C0C0; + P5_IOCR4.reg = 0xC0C0C0C0; + + P5_PDR.reg = 0x00000000; + + P5_OMR.reg = 0x0000FFFF; +} +/*---------------------------------------------------------------------------*/ + +void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue ) +{ +unsigned long ulBitPattern = 1UL << uxLED; + if ( xValue != 0 ) + { + P5_OMR.reg = ulBitPattern; + } + else + { + P5_OMR.reg = ulBitPattern << 16; + } +} +/*---------------------------------------------------------------------------*/ + +void vParTestToggleLED( unsigned portBASE_TYPE uxLED ) +{ +unsigned long ulBitPattern = 1UL << uxLED; + P5_OMR.reg = ( ulBitPattern << 16 ) | ulBitPattern; +} +/*---------------------------------------------------------------------------*/ diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ThirdPartyCode/cpufreq.c b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ThirdPartyCode/cpufreq.c new file mode 100644 index 000000000..cffeb7e47 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ThirdPartyCode/cpufreq.c @@ -0,0 +1,162 @@ +/*==================================================================== +* Project: Board Support Package (BSP) +* Developed using: +* Function: Determine the frequency the CPU is running at (TC1782) +* +* Copyright HighTec EDV-Systeme GmbH 1982-2010 +*====================================================================*/ + +#include +#include +#include + + +#ifndef DEF_FRQ +#define DEF_FRQ 20000000U /* TriBoard-TC1782 quartz frequency is 20 MHz */ +#endif /* DEF_FRQ */ + +#define VCOBASE_FREQ 400000000U /* ?? */ + +/* divider values for 150 MHz */ +#define SYS_CFG_PDIV 2 +#define SYS_CFG_NDIV 30 +#define SYS_CFG_K1DIV 2 +#define SYS_CFG_K2DIV 2 + + +/* prototypes for global functions */ +void set_cpu_frequency(void); +unsigned int get_cpu_frequency(void); + +/* initialization flag: prevent multiple initialization of PLL_CLC */ +static int freq_init = 0; + + +/* Set the frequency the CPU is running at */ + +void set_cpu_frequency(void) +{ + SCU_PLLCON0_t_nonv pllcon0; + SCU_PLLCON1_t_nonv pllcon1; + + if (freq_init) + { + return; + } + + freq_init = 1; + + /* check whether we are already running at desired clockrate */ + pllcon0 = SCU_PLLCON0; + pllcon1 = SCU_PLLCON1; + if ( ((SYS_CFG_NDIV - 1) == pllcon0.bits.NDIV) + && ((SYS_CFG_PDIV - 1) == pllcon0.bits.PDIV) + && ((SYS_CFG_K1DIV - 1) == pllcon1.bits.K1DIV) + && ((SYS_CFG_K2DIV - 1) == pllcon1.bits.K2DIV) + && SCU_PLLSTAT.bits.VCOLOCK) + { + return; + } + + if (!SCU_PLLSTAT.bits.PWDSTAT) + { + /* set speed to 180 MHz with 20MHz Crystal */ + pllcon0.reg = 0; + pllcon1.reg = 0; + pllcon0.bits.NDIV = SYS_CFG_NDIV - 1; + pllcon0.bits.PDIV = SYS_CFG_PDIV - 1; + pllcon1.bits.K2DIV = SYS_CFG_K2DIV - 1; + pllcon1.bits.K1DIV = SYS_CFG_K1DIV - 1; + pllcon0.bits.VCOBYP = 1; + pllcon0.bits.CLRFINDIS = 1; + pllcon0.bits.PLLPWD = 1; + pllcon0.bits.RESLD = 1; + + unlock_wdtcon(); + /* FPI at half CPU speed */ + SCU_CCUCON0.reg = 1; + + /* force prescaler mode */ + SCU_PLLCON0.bits.VCOBYP = 1; + + /* wait for prescaler mode */ + while (!SCU_PLLSTAT.bits.VCOBYST) + ; + + /* write new control values */ + SCU_PLLCON1 = pllcon1; + SCU_PLLCON0 = pllcon0; + lock_wdtcon(); + + /* wait for stable VCO frequency */ + while (!SCU_PLLSTAT.bits.VCOLOCK) + ; + + unlock_wdtcon(); + /* leave prescaler mode */ + SCU_PLLCON0.bits.VCOBYP = 0; + lock_wdtcon(); + } +} + +/* Determine the frequency the CPU is running at */ + +unsigned int get_cpu_frequency(void) +{ + unsigned int frequency; + unsigned int fpidiv; + SCU_PLLCON0_t_nonv pllcon0; + SCU_PLLCON1_t_nonv pllcon1; + SCU_PLLSTAT_t_nonv pllstat; + + if (!freq_init) + { + set_cpu_frequency(); + +#ifdef ENABLE_ICACHE + /* enable instruction cache (PMI_CON0) */ + unlock_wdtcon(); + PMI_CON0.bits.PCBYP = 0; + lock_wdtcon(); +#endif /* ENABLE_ICACHE */ + } + + pllcon0 = SCU_PLLCON0; + pllcon1 = SCU_PLLCON1; + pllstat = SCU_PLLSTAT; + + /* read FPI divider value */ + fpidiv = SCU_CCUCON0.bits.FPIDIV; + + if (pllstat.bits.VCOBYST) + { + /* prescaler mode */ + unsigned int k_div; + + k_div = pllcon1.bits.K1DIV + 1; + frequency = DEF_FRQ / k_div; + } + else if (pllstat.bits.FINDIS) + { + /* freerunning mode */ + unsigned int k_div; + + k_div = pllcon1.bits.K2DIV + 1; + frequency = VCOBASE_FREQ / k_div; + } + else + { + /* normal mode */ + unsigned int k_div, n_div, p_div; + + n_div = pllcon0.bits.NDIV + 1; + p_div = pllcon0.bits.PDIV + 1; + k_div = pllcon1.bits.K2DIV + 1; + + frequency = DEF_FRQ * n_div / (k_div * p_div); + } + + frequency /= (fpidiv + 1); + + return frequency; +} diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c new file mode 100644 index 000000000..385a29fe8 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c @@ -0,0 +1,568 @@ +/* + FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +/* Standard includes. */ +#include +#include + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "croutine.h" + +/* Demo application includes. */ +#include "partest.h" +#include "flash.h" +#include "integer.h" +#include "PollQ.h" +#include "comtest2.h" +#include "semtest.h" +#include "dynamic.h" +#include "BlockQ.h" +#include "blocktim.h" +#include "countsem.h" +#include "GenQTest.h" +#include "recmutex.h" +#include "serial.h" +/*-----------------------------------------------------------*/ + +/* Constants for the ComTest tasks. */ +#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 115200 ) +#define mainCOM_TEST_LED ( 5 ) + +/* Priorities for the demo application tasks. */ +#define mainLED_TASK_PRIORITY ( ( tskIDLE_PRIORITY + 1 ) | portPRIVILEGE_BIT ) +#define mainCOM_TEST_PRIORITY ( ( tskIDLE_PRIORITY + 2 ) | portPRIVILEGE_BIT ) +#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCHECK_TASK_PRIORITY ( ( tskIDLE_PRIORITY + 4 ) | portPRIVILEGE_BIT ) +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 ) + +/* The rate at which the on board LED will toggle when there is/is not an +error. */ +#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 5000 / portTICK_RATE_MS ) +#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS ) +#define mainON_BOARD_LED_BIT ( ( unsigned long ) 7 ) +#define mainREG_TEST_TASKS 1 +/*-----------------------------------------------------------*/ + +/* + * Checks that all the demo application tasks are still executing without error + * - as described at the top of the file. + */ +static long prvCheckOtherTasksAreStillRunning( void ); + +/* + * The task that executes at the highest priority and calls + * prvCheckOtherTasksAreStillRunning(). See the description at the top + * of the file. + */ +static void vErrorChecks( void *pvParameters ); +/*-----------------------------------------------------------*/ + +/* + * Configure the processor for use with the Olimex demo board. This includes + * setup for the I/O, system clock, and access timings. + */ +static void prvSetupHardware( void ); + +/* + * Function to create the heavily restricted RegTest tasks. + */ +static void vStartRegTestTasks( unsigned portBASE_TYPE uxPriority ); + +#if mainREG_TEST_TASKS == 1 + +/* + * Writes to and checks the value of each register that is used in the context + * of a task. + */ +static void vRegTask1( void *pvParameters ); +static void vRegTask2( void *pvParameters ); + +/* + * Specific check to see if the Register test functions are still operating. + */ +static portBASE_TYPE xAreRegTestTasksStillRunning( void ); + +#endif /* mainREG_TEST_TASKS */ +/*-----------------------------------------------------------*/ + +/* Used by the register test tasks to indicated liveness. */ +static unsigned long ulRegisterTest1Count = 0; +static unsigned long ulRegisterTest2Count = 0; +/*-----------------------------------------------------------*/ + +/* + * Starts all the other tasks, then starts the scheduler. + */ +int main( void ) +{ + /* Setup the hardware for use with the TriCore evaluation board. */ + prvSetupHardware(); + + /* Start the demo/test application tasks. */ + vStartIntegerMathTasks( tskIDLE_PRIORITY ); + vStartLEDFlashTasks( mainLED_TASK_PRIORITY ); + vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartDynamicPriorityTasks(); + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vCreateBlockTimeTasks(); + vStartCountingSemaphoreTasks(); + vStartGenericQueueTasks( tskIDLE_PRIORITY ); + vStartRecursiveMutexTasks(); + vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED ); + vStartRegTestTasks( tskIDLE_PRIORITY ); + + /* Start the check task - which is defined in this file. */ + xTaskCreate( vErrorChecks, ( signed char * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); + + /* Now all the tasks have been started - start the scheduler. */ + vTaskStartScheduler(); + + /* Should never reach here! */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static void vErrorChecks( void *pvParameters ) +{ +portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD; + + /* Just to stop compiler warnings. */ + ( void ) pvParameters; + + /* Cycle for ever, delaying then checking all the other tasks are still + operating without error. If an error is detected then the delay period + is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so + the on board LED flash rate will increase. */ + + for( ;; ) + { + /* Delay until it is time to execute again. */ + vTaskDelay( xDelayPeriod ); + + /* Check all the standard demo application tasks are executing without + error. */ + if( prvCheckOtherTasksAreStillRunning() != pdPASS ) + { + /* An error has been detected in one of the tasks - flash faster. */ + xDelayPeriod = mainERROR_FLASH_PERIOD; + } + + /* The toggle rate of the LED depends on how long this task delays for. + An error reduces the delay period and so increases the toggle rate. */ + vParTestToggleLED( mainON_BOARD_LED_BIT ); + } +} +/*-----------------------------------------------------------*/ + +static long prvCheckOtherTasksAreStillRunning( void ) +{ +long lReturn = pdPASS; + + /* Check all the demo tasks (other than the flash tasks) to ensure + that they are all still running, and that none of them have detected + an error. */ + + if( xAreIntegerMathsTaskStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if( xAreComTestTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if( xArePollingQueuesStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if( xAreDynamicPriorityTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if ( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + if( xAreRegTestTasksStillRunning() != pdTRUE ) + { + lReturn = pdFAIL; + } + + return lReturn; +} +/*-----------------------------------------------------------*/ + +static void prvSetupHardware( void ) +{ +extern void set_cpu_frequency(void); + + /* Set-up the PLL. */ + set_cpu_frequency(); + + /* Initialise LED outputs. */ + vParTestInitialise(); +} +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook( void ) +{ + /* This function will be called if a call to pvPortMalloc() fails to return + the requested memory. pvPortMalloc() is called internally by the scheduler + whenever a task, queue or semaphore is created. */ + _debug(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +void vApplicationTickHook( void ) +{ + /* + * This function will be called whenever the system tick is incremented. + * Note that it is executed as part of an interrupt and as such should + * not block nor be used for any long running execution. + */ + vParTestToggleLED( mainON_BOARD_LED_BIT - 1 ); +} +/*-----------------------------------------------------------*/ + +void vApplicationIdleHook( void ) +{ + /* + * This function will be called during the normal execution of the IDLE task. + */ +} +/*-----------------------------------------------------------*/ + +#if mainREG_TEST_TASKS == 1 + +static void vStartRegTestTasks( unsigned portBASE_TYPE uxPriority ) +{ + (void)xTaskCreate( vRegTask1, ( signed char * ) "Reg 1", configMINIMAL_STACK_SIZE, &ulRegisterTest1Count, uxPriority, NULL ); + (void)xTaskCreate( vRegTask2, ( signed char * ) "Reg 2", configMINIMAL_STACK_SIZE, &ulRegisterTest2Count, uxPriority, NULL ); +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xAreRegTestTasksStillRunning( void ) +{ +static unsigned long ulPreviousRegisterTest1Count = 0; +static unsigned long ulPreviousRegisterTest2Count = 0; +portBASE_TYPE xReturn = pdFALSE; + + /* Check to see if the Counts have changed since the last check. */ + xReturn = ( ulPreviousRegisterTest1Count != ulRegisterTest1Count ); + xReturn = xReturn && ( ulPreviousRegisterTest2Count != ulRegisterTest2Count ); + + /* Record the last count. */ + ulPreviousRegisterTest1Count = ulRegisterTest1Count; + ulPreviousRegisterTest2Count = ulRegisterTest2Count; + + return xReturn; +} +/*-----------------------------------------------------------*/ + +/* + * Set all of the registers that are used as part of the task context + * to known values and test that those values are maintained across + * context switches. + */ +void vRegTask1( void *pvParameters ) +{ + /* Make space on the stack for the parameter and a counter. */ + __asm volatile( " sub.a %sp, 4 \n" + " st.a [%sp], %a4 \n" + " mov %d15, 0 \n" + " st.w [%sp]4, %d15 \n" ); + + for (;;) + { + /* Change all of the Context sensitive registers (except SP and RA). */ + __asm volatile( + " mov %d0, 0 \n" + " mov %d1, 1 \n" + " mov %d2, 2 \n" + " mov %d3, 3 \n" + " mov %d4, 4 \n" + " mov %d5, 5 \n" + " mov %d6, 6 \n" + " mov %d7, 7 \n" + " mov %d8, 8 \n" + " mov %d9, 9 \n" + " mov %d10, 10 \n" + " mov %d11, 11 \n" + " mov %d12, 12 \n" + " mov %d13, 13 \n" + " mov %d14, 14 \n" + " mov %d15, 15 \n" + " mov.a %a2, 2 \n" + " mov.a %a3, 3 \n" + " mov.a %a4, 4 \n" + " mov.a %a5, 5 \n" + " mov.a %a6, 6 \n" + " mov.a %a7, 7 \n" + " mov.a %a12, 12 \n" + " mov.a %a13, 13 \n" + " mov.a %a14, 14 \n" ); + /* Yield to force a context switch. */ + taskYIELD(); + /* Check the values of the registers. */ + __asm( " eq %d0, %d0, 0 \n" \ + " jne %d0, 1, _task1_loop \n" \ + " eq %d1, %d1, 1 \n" \ + " jne %d1, 1, _task1_loop \n" \ + " eq %d2, %d2, 2 \n" \ + " jne %d2, 1, _task1_loop \n" \ + " eq %d3, %d3, 3 \n" \ + " jne %d3, 1, _task1_loop \n" \ + " eq %d4, %d4, 4 \n" \ + " jne %d4, 1, _task1_loop \n" \ + " eq %d5, %d5, 5 \n" \ + " jne %d5, 1, _task1_loop \n" \ + " eq %d6, %d6, 6 \n" \ + " jne %d6, 1, _task1_loop \n" \ + " eq %d7, %d7, 7 \n" \ + " jne %d7, 1, _task1_loop \n" \ + " eq %d8, %d8, 8 \n" \ + " jne %d8, 1, _task1_loop \n" \ + " eq %d9, %d9, 9 \n" \ + " jne %d9, 1, _task1_loop \n" \ + " eq %d10, %d10, 10 \n" \ + " jne %d10, 1, _task1_loop \n" \ + " eq %d11, %d11, 11 \n" \ + " jne %d11, 1, _task1_loop \n" \ + " eq %d12, %d12, 12 \n" \ + " jne %d12, 1, _task1_loop \n" \ + " eq %d13, %d13, 13 \n" \ + " jne %d13, 1, _task1_loop \n" \ + " eq %d14, %d14, 14 \n" \ + " jne %d14, 1, _task1_loop \n" \ + " eq %d15, %d15, 15 \n" \ + " jne %d15, 1, _task1_loop \n" \ + " mov.a %a15, 2 \n" \ + " jne.a %a15, %a2, _task1_loop \n" \ + " mov.a %a15, 3 \n" \ + " jne.a %a15, %a3, _task1_loop \n" \ + " mov.a %a15, 4 \n" \ + " jne.a %a15, %a4, _task1_loop \n" \ + " mov.a %a15, 5 \n" \ + " jne.a %a15, %a5, _task1_loop \n" \ + " mov.a %a15, 6 \n" \ + " jne.a %a15, %a6, _task1_loop \n" \ + " mov.a %a15, 7 \n" \ + " jne.a %a15, %a7, _task1_loop \n" \ + " mov.a %a15, 12 \n" \ + " jne.a %a15, %a12, _task1_loop \n" \ + " mov.a %a15, 13 \n" \ + " jne.a %a15, %a13, _task1_loop \n" \ + " mov.a %a15, 14 \n" \ + " jne.a %a15, %a14, _task1_loop \n" \ + " j _task1_skip \n" \ + "_task1_loop: \n" \ + " debug \n" \ + " j _task1_loop \n" \ + "_task1_skip: \n" ); + + /* Load the parameter address from the stack and modify the value. */ + __asm volatile( \ + " ld.w %d15, [%sp]4 \n" \ + " add %d15, %d15, 1 \n" \ + " st.w [%sp]4, %d15 \n" \ + " ld.a %a4, [%sp] \n" \ + " st.w [%a4], %d15 \n" ); + } + + /* The parameter is used but in the assembly. */ + (void)pvParameters; +} +/*-----------------------------------------------------------*/ + +/* + * Set all of the registers that are used as part of the task context + * to known values and test that those values are maintained across + * context switches. + */ +void vRegTask2( void *pvParameters ) +{ + /* Make space on the stack for the parameter and a counter. */ + __asm volatile( " sub.a %sp, 4 \n" \ + " st.a [%sp], %a4 \n" \ + " mov %d15, 0 \n" \ + " st.w [%sp]4, %d15 \n" ); + + for (;;) + { + /* Change all of the Context sensitive registers (except SP and RA). */ + __asm( " mov %d0, 7 \n" \ + " mov %d1, 6 \n" \ + " mov %d2, 5 \n" \ + " mov %d3, 4 \n" \ + " mov %d4, 3 \n" \ + " mov %d5, 2 \n" \ + " mov %d6, 1 \n" \ + " mov %d7, 0 \n" \ + " mov %d8, 15 \n" \ + " mov %d9, 14 \n" \ + " mov %d10, 13 \n" \ + " mov %d11, 12 \n" \ + " mov %d12, 11 \n" \ + " mov %d13, 10 \n" \ + " mov %d14, 9 \n" \ + " mov %d15, 8 \n" \ + " mov.a %a2, 14 \n" \ + " mov.a %a3, 13 \n" \ + " mov.a %a4, 12 \n" \ + " mov.a %a5, 7 \n" \ + " mov.a %a6, 6 \n" \ + " mov.a %a7, 5 \n" \ + " mov.a %a12, 4 \n" \ + " mov.a %a13, 3 \n" \ + " mov.a %a14, 2 \n" ); + /* Yield to force a context switch. */ + taskYIELD(); + /* Check the values of the registers. */ + __asm( " eq %d0, %d0, 7 \n" \ + " jne %d0, 1, _task2_loop \n" \ + " eq %d1, %d1, 6 \n" \ + " jne %d1, 1, _task2_loop \n" \ + " eq %d2, %d2, 5 \n" \ + " jne %d2, 1, _task2_loop \n" \ + " eq %d3, %d3, 4 \n" \ + " jne %d3, 1, _task2_loop \n" \ + " eq %d4, %d4, 3 \n" \ + " jne %d4, 1, _task2_loop \n" \ + " eq %d5, %d5, 2 \n" \ + " jne %d5, 1, _task2_loop \n" \ + " eq %d6, %d6, 1 \n" \ + " jne %d6, 1, _task2_loop \n" \ + " eq %d7, %d7, 0 \n" \ + " jne %d7, 1, _task2_loop \n" \ + " eq %d8, %d8, 15 \n" \ + " jne %d8, 1, _task2_loop \n" \ + " eq %d9, %d9, 14 \n" \ + " jne %d9, 1, _task2_loop \n" \ + " eq %d10, %d10, 13 \n" \ + " jne %d10, 1, _task2_loop \n" \ + " eq %d11, %d11, 12 \n" \ + " jne %d11, 1, _task2_loop \n" \ + " eq %d12, %d12, 11 \n" \ + " jne %d12, 1, _task2_loop \n" \ + " eq %d13, %d13, 10 \n" \ + " jne %d13, 1, _task2_loop \n" \ + " eq %d14, %d14, 9 \n" \ + " jne %d14, 1, _task2_loop \n" \ + " eq %d15, %d15, 8 \n" \ + " jne %d15, 1, _task2_loop \n" \ + " mov.a %a15, 14 \n" \ + " jne.a %a15, %a2, _task2_loop \n" \ + " mov.a %a15, 13 \n" \ + " jne.a %a15, %a3, _task2_loop \n" \ + " mov.a %a15, 12 \n" \ + " jne.a %a15, %a4, _task2_loop \n" \ + " mov.a %a15, 7 \n" \ + " jne.a %a15, %a5, _task2_loop \n" \ + " mov.a %a15, 6 \n" \ + " jne.a %a15, %a6, _task2_loop \n" \ + " mov.a %a15, 5 \n" \ + " jne.a %a15, %a7, _task2_loop \n" \ + " mov.a %a15, 4 \n" \ + " jne.a %a15, %a12, _task2_loop \n" \ + " mov.a %a15, 3 \n" \ + " jne.a %a15, %a13, _task2_loop \n" \ + " mov.a %a15, 2 \n" \ + " jne.a %a15, %a14, _task2_loop \n" \ + " j _task2_skip \n" \ + "_task2_loop: \n" \ + " j _task2_loop \n" \ + "_task2_skip: \n" ); + + /* Load the parameter address from the stack and modify the value. */ + __asm volatile( \ + " ld.w %d15, [%sp]4 \n" \ + " add %d15, %d15, 1 \n" \ + " st.w [%sp]4, %d15 \n" \ + " ld.a %a4, [%sp] \n" \ + " st.w [%a4], %d15 \n" ); + } + + /* The parameter is used but in the assembly. */ + (void)pvParameters; +} +/*-----------------------------------------------------------*/ +#endif /* mainREG_TEST_TASKS */ diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c new file mode 100644 index 000000000..9d81801ab --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c @@ -0,0 +1,250 @@ +/* + FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd. + + + *************************************************************************** + * * + * FreeRTOS tutorial books are available in pdf and paperback. * + * Complete, revised, and edited pdf reference manuals are also * + * available. * + * * + * Purchasing FreeRTOS documentation will not only help you, by * + * ensuring you get running as quickly as possible and with an * + * in-depth knowledge of how to use FreeRTOS, it will also help * + * the FreeRTOS project to continue with its mission of providing * + * professional grade, cross platform, de facto standard solutions * + * for microcontrollers - completely free of charge! * + * * + * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * + * * + * Thank you for using FreeRTOS, and thank you for your support! * + * * + *************************************************************************** + + + This file is part of the FreeRTOS distribution. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + >>>NOTE<<< The modification to the GPL is included to allow you to + distribute a combined work that includes FreeRTOS without being obliged to + provide the source code for proprietary components outside of the FreeRTOS + kernel. FreeRTOS is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. You should have received a copy of the GNU General Public + License and the FreeRTOS license exception along with FreeRTOS; if not it + can be viewed here: http://www.freertos.org/a00114.html and also obtained + by writing to Richard Barry, contact details for whom are available on the + FreeRTOS WEB site. + + 1 tab == 4 spaces! + + http://www.FreeRTOS.org - Documentation, latest information, license and + contact details. + + http://www.SafeRTOS.com - A version that is certified for use in safety + critical systems. + + http://www.OpenRTOS.com - Commercial support, development, porting, + licensing and training services. +*/ + +#include +#include +#include +#include + +/* Scheduler Includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +/* Demo Includes. */ +#include "serial.h" +/*---------------------------------------------------------------------------*/ + +#define serialINTERRUPT_PRIORITY_TX 16 +#define serialINTERRUPT_PRIORITY_RX 18 +/*---------------------------------------------------------------------------*/ + +/* + * This reference is required by the Save/Restore Context Macros. + */ +extern volatile unsigned portBASE_TYPE * pxCurrentTCB; +/*-----------------------------------------------------------*/ + +/** + * This function will check to see whether the Serial Transmit Interrupt is currently + * activated, meaning that the interrupt is working through the back log of bytes + * that it needs to send. If the ISR is not enabled, then it will be triggered to send + * the first byte and it will be automatically re-triggered when that byte has been + * sent. When the queue is exhausted, the ISR disables itself. + * This function is privileged because it will trigger an interrupt. + */ +static void prvCheckTransmit( void ) PRIVILEGED_FUNCTION; +/*-----------------------------------------------------------*/ + +void vSerialTransmitBufferInterrupt( int iArg ) __attribute__((longcall)); +void vSerialReceiveInterrupt( int iArg )__attribute__((longcall)); +/*-----------------------------------------------------------*/ + +static xQueueHandle xSerialTransmitQueue = NULL; +static xQueueHandle xSerialReceiveQueue = NULL; +static volatile portBASE_TYPE xTransmitStatus = 0UL; +/*---------------------------------------------------------------------------*/ + +xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) +{ +unsigned long ulReloadValue = 0UL; + ulReloadValue = ( configPERIPHERAL_CLOCK_HZ / ( 32 * ulWantedBaud ) ) - 1; + + if ( NULL == xSerialTransmitQueue ) + { + xSerialTransmitQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); + xSerialReceiveQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); + } + + /* Enable ASC0 Module. */ + unlock_wdtcon(); + while ( 0 != ( WDT_CON0.reg & 0x1UL ) ); + ASC0_CLC.reg = 0x0200UL; + lock_wdtcon(); + + /* Disable the Operation. */ + ASC0_CON.reg &= 0xFFFF7FFF; + + /* Set-up the GPIO Ports. */ + P3_IOCR0.reg = 0x00009000; /* 3.0 ASC In, 3.1 Alt ASC Out */ + /* Do we need to set 3.1 high? OMR.PS1 = 1??? */ + + /* Write the Baudrate. */ + ASC0_BG.reg = ulReloadValue; + + /* Reconfigure and re-initialise the Operation. */ + ASC0_PISEL.reg = 0UL; + ASC0_CON.reg = 0x00008011; /* 1 Start, 1 Stop, 8 Data, No Parity, No Error Checking, Receive On, Module On. */ + + /* Install the Tx interrupt. */ + if ( 0 != _install_int_handler( serialINTERRUPT_PRIORITY_TX, vSerialTransmitBufferInterrupt, 0 ) ) + { + ASC0_TBSRC.reg = serialINTERRUPT_PRIORITY_TX | 0x5000UL; + xTransmitStatus = 0UL; + } + + /* Install the Rx interrupt. */ + if ( 0 != _install_int_handler( serialINTERRUPT_PRIORITY_RX, vSerialReceiveInterrupt, 0 ) ) + { + ASC0_RSRC.reg = serialINTERRUPT_PRIORITY_RX | 0x5000UL; + } + + /* COM Handle is never used by demo code. */ + return (xComPortHandle) pdPASS; +} +/*---------------------------------------------------------------------------*/ + +void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength ) +{ +unsigned short usChar; + for ( usChar = 0; usChar < usStringLength; usChar++ ) + { + (void)xSerialPutChar( pxPort, pcString[ usChar ], portMAX_DELAY ); + } +} +/*---------------------------------------------------------------------------*/ + +signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime ) +{ + return xQueueReceive( xSerialReceiveQueue, pcRxedChar, xBlockTime ); + (void)pxPort; +} +/*---------------------------------------------------------------------------*/ + +signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime ) +{ +portBASE_TYPE xReturn = pdPASS; + + /* Send the character to the interrupt handler. */ + xReturn = xQueueSend( xSerialTransmitQueue, &cOutChar, xBlockTime ); + + /* Start the transmission of bytes if necessary. */ + prvCheckTransmit(); + + return xReturn; + + (void)pxPort; +} +/*---------------------------------------------------------------------------*/ + +void vSerialTransmitBufferInterrupt( int iArg ) +{ +portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; +unsigned char ucTx; + + /* ACK. */ + ASC0_TBSRC.reg |= 0x4000UL; + xTransmitStatus = 1UL; + + /* Enter the Critical Section. */ + portINTERRUPT_ENTER_CRITICAL(); + { + /* TBUF Can be refilled. */ + if ( pdPASS == xQueueReceiveFromISR( xSerialTransmitQueue, &ucTx, &xHigherPriorityTaskWoken ) ) + { + ASC0_TBUF.reg = ucTx; + } + else + { + /* Failed to get a character out of the Queue. No longer busy. */ + xTransmitStatus = 0UL; + } + } + portINTERRUPT_EXIT_CRITICAL(); + + /* Finally end ISR and switch Task. */ + portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + + (void)iArg; +} +/*---------------------------------------------------------------------------*/ + +void vSerialReceiveInterrupt( int iArg ) +{ +portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; +unsigned char ucRx; + + /* Grab the character as early as possible. */ + ucRx = (unsigned char)ASC0_RBUF.reg; + + /* ACK. */ + ASC0_RSRC.reg |= 0x4000UL; + + /* Enter the Critical Section. */ + portINTERRUPT_ENTER_CRITICAL(); + { + /* Frame available in RBUF. */ + if ( pdPASS != xQueueSendFromISR( xSerialReceiveQueue, &ucRx, &xHigherPriorityTaskWoken ) ) + { + /* Need some error handling code. */ + } + } + portINTERRUPT_EXIT_CRITICAL(); + + /* Finally end ISR and switch Task. */ + portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + + (void)iArg; +} +/*---------------------------------------------------------------------------*/ + +void prvCheckTransmit( void ) +{ + /* Check to see if the interrupt handler is working its way through the buffer. */ + if ( 0 == xTransmitStatus ) + { + /* Not currently operational so kick off the first byte. */ + ASC0_TBSRC.reg |= 0x8000UL; + } +} +/*---------------------------------------------------------------------------*/ diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/ld/iRAM.ld b/Demo/TriCore_TC1782_TriBoard_GCC/ld/iRAM.ld new file mode 100644 index 000000000..de9b9d71e --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/ld/iRAM.ld @@ -0,0 +1,655 @@ + +/* + * Name: iRAM.ld + * + * Generated Linker Description File + * Copyright (C) 2010 HighTec EDV-Systeme GmbH. + * (!Do not edit outsite of the protection areas!) + * + * Description: + * internal RAM configuration + */ + +/* + * Define Entrypoint of Executable + */ +ENTRY(_start) + +/* + * Global + */ +/*Program Flash Memory (PFLASH)*/ +__PMU_PFLASH_BEGIN = 0x80000000; +__PMU_PFLASH_SIZE = 2560K; +/*Data Flash Memory (DFLASH0)*/ +__PMU_DFLASH0_BEGIN = 0xAFE00000; +__PMU_DFLASH0_SIZE = 64K; +/*Data Flash Memory (DFLASH1)*/ +__PMU_DFLASH1_BEGIN = 0xAFE10000; +__PMU_DFLASH1_SIZE = 64K; +/*Boot ROM (BROM)*/ +__BROM_BEGIN = 0xAFFFC000; +__BROM_SIZE = 16K; +/*Scratch-Pad RAM (SPRAM)*/ +__PMI_SPRAM_BEGIN = 0xC0000000; +__PMI_SPRAM_SIZE = 40K; +/*Local Data RAM (LDRAM)*/ +__DMI_LDRAM_BEGIN = 0xD0000000; +__DMI_LDRAM_SIZE = 128K; +/*PCP Code Memory (CMEM)*/ +__PCP_CMEM_BEGIN = 0xF0060000; +__PCP_CMEM_SIZE = 32K; +/*PCP Data Memory (PRAM)*/ +__PCP_PRAM_BEGIN = 0xF0050000; +__PCP_PRAM_SIZE = 16K; + +__ISTACK_SIZE = DEFINED (__ISTACK_SIZE) ? __ISTACK_SIZE : 256; +__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K; +__HEAP_SIZE = DEFINED (__HEAP_SIZE) ? __HEAP_SIZE : 4K ; +__CSA_SIZE = DEFINED (__CSA_SIZE) ? __CSA_SIZE : 16K ; + +/** + * User defined global region + */ +/*PROTECTED REGION ID(Protection:iRAM-Global) ENABLED START*/ +/*Protection-Area for your own LDF-Code*/ +/*PROTECTED REGION END*/ + +/* + * internal RAM configuration + */ +MEMORY +{ + PMU_PFLASH (rx!p): org = 0x80000000, len = 2560K /*Program Flash Memory (PFLASH)*/ + PMU_DFLASH0 (r!xp): org = 0xAFE00000, len = 64K /*Data Flash Memory (DFLASH0)*/ + PMU_DFLASH1 (r!xp): org = 0xAFE10000, len = 64K /*Data Flash Memory (DFLASH1)*/ + BROM (rx!p): org = 0xAFFFC000, len = 16K /*Boot ROM (BROM)*/ + PMI_SPRAM (wx!p): org = 0xC0000000, len = 40K /*Scratch-Pad RAM (SPRAM)*/ + DMI_LDRAM (w!xp): org = 0xD0000000, len = 128K /*Local Data RAM (LDRAM)*/ + PCP_CMEM (rxp): org = 0xF0060000, len = 32K /*PCP Code Memory (CMEM)*/ + PCP_PRAM (wp!x): org = 0xF0050000, len = 16K /*PCP Data Memory (PRAM)*/ + +} + +SECTIONS +{ + /*Code-Sections*/ + + /* + * Startup code for TriCore + */ + .startup_code : + { + PROVIDE(__startup_code_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .startup_code.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.startup_code) /*Startup code for TriCore*/ + *(.startup_code*) + + /*PROTECTED REGION ID(Protection: iRAM .startup_code) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__startup_code_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Code section + */ + .text : + { + PROVIDE(__text_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .text.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.text) /*Code section*/ + *(.text*) + *(.gnu.linkonce.t.*) + + /*PROTECTED REGION ID(Protection: iRAM .text) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__text_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Code executed before calling main + */ + .init : + { + PROVIDE(__init_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .init.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.init)) /*Code executed before calling main*/ + KEEP(*(.init*)) + + /*PROTECTED REGION ID(Protection: iRAM .init) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__init_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Code executed before exiting program + */ + .fini : + { + PROVIDE(__fini_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .fini.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.fini)) /*Code executed before exiting program*/ + KEEP(*(.fini*)) + + /*PROTECTED REGION ID(Protection: iRAM .fini) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__fini_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Section for trap table + */ + .traptab : + { + PROVIDE(__traptab_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .traptab.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.traptab) /*Section for trap table*/ + *(.traptab*) + + /*PROTECTED REGION ID(Protection: iRAM .traptab) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__traptab_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Section for interrupt table + */ + .inttab : + { + PROVIDE(__inttab_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .inttab.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.inttab) /*Section for interrupt table*/ + *(.inttab*) + + /*PROTECTED REGION ID(Protection: iRAM .inttab) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__inttab_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Exception handling frame for C++ exceptions + */ + .eh_frame : + { + PROVIDE(__eh_frame_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .eh_frame.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.eh_frame) /*Exception handling frame for C++ exceptions*/ + *(.eh_frame*) + + /*PROTECTED REGION ID(Protection: iRAM .eh_frame) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__eh_frame_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Section for constructors + */ + .ctors : + { + PROVIDE(__ctors_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .ctors.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.ctors)) /*Section for constructors*/ + KEEP(*(.ctors*)) + + /*PROTECTED REGION ID(Protection: iRAM .ctors) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__ctors_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Section for destructors + */ + .dtors : + { + PROVIDE(__dtors_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .dtors.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.dtors)) /*Section for destructors*/ + KEEP(*(.dtors*)) + + /*PROTECTED REGION ID(Protection: iRAM .dtors) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__dtors_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + + /*Absolute Data-Sections*/ + + /* + * Initialised data addressed as absolute + */ + .zdata : + { + PROVIDE(__zdata_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .zdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.zdata) /*Initialised data addressed as absolute*/ + *(.zdata*) + *(.gnu.linkonce.z.*) + *(.gnu.linkonce.zr.*) + + /*PROTECTED REGION ID(Protection: iRAM .zdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__zdata_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not initialised data addressed as absolute + */ + .zbss (NOLOAD) : + { + PROVIDE(__zbss_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .zbss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.zbss) /*Not Initialised data addressed as absolute*/ + *(.zbss*) + *(.gnu.linkonce.zb.*) + + /*PROTECTED REGION ID(Protection: iRAM .zbss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__zbss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not initialised bit data + */ + .bbss (NOLOAD) : + { + PROVIDE(__bbss_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .bbss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.bbss) /*Not initialised bit data*/ + *(.bbss*) + + /*PROTECTED REGION ID(Protection: iRAM .bbss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__bbss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Bit variables + */ + .bdata : + { + PROVIDE(__bdata_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .bdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.bdata) /*Bit variables*/ + *(.bdata*) + + /*PROTECTED REGION ID(Protection: iRAM .bdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__bdata_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + + /*Small Data-Sections*/ + + /* + * Storage of write-protected data addressed as small + */ + .sdata2 : + { + PROVIDE(__sdata2_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .sdata2.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.sdata.rodata) /*Storage of write-protected data addressed as small*/ + *(.sdata.rodata*) + *(.gnu.linkonce.sr.*) + + /*PROTECTED REGION ID(Protection: iRAM .sdata2) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__sdata2_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Section stores initialised data which is addressable by small data area pointer (%a0) + */ + .sdata : + { + PROVIDE(__sdata_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .sdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.sdata) /*Section stores initialised data which is addressable by small data area pointer (%a0)*/ + *(.sdata*) + *(.gnu.linkonce.s.*) + + /*PROTECTED REGION ID(Protection: iRAM .sdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__sdata_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0) + */ + .sbss (NOLOAD) : + { + PROVIDE(__sbss_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .sbss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.sbss) /*Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)*/ + *(.sbss*) + *(.gnu.linkonce.sb.*) + + /*PROTECTED REGION ID(Protection: iRAM .sbss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__sbss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + + /*Normal Data-Sections*/ + + /* + * Storage of write-protected data + */ + .rodata : + { + PROVIDE(__rodata_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .rodata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.rodata) /*Storage of write-protected data*/ + *(.rodata*) + *(.gnu.linkonce.r.*) + *(.jcr.*) + + /*PROTECTED REGION ID(Protection: iRAM .rodata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__rodata_end = .); + . = ALIGN(8); + + } > PMI_SPRAM /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * Initialised data + */ + .data : + { + PROVIDE(__data_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .data.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.data) /*Initialised data*/ + *(.data*) + *(.gnu.linkonce.d.*) + + /*PROTECTED REGION ID(Protection: iRAM .data) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__data_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not Initialised data + */ + .bss (NOLOAD) : + { + PROVIDE(__bss_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .bss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.bss) /*Not Initialised data*/ + *(.bss*) + *(.gnu.linkonce.b.*) + + /*PROTECTED REGION ID(Protection: iRAM .bss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__bss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + + + /*PCP-Sections*/ + + /* + * PCP Code Section + */ + .pcptext : + { + PROVIDE(__pcptext_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .pcptext.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.pcptext)) /*PCP Code Section*/ + KEEP(*(.pcptext*)) + + /*PROTECTED REGION ID(Protection: iRAM .pcptext) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__pcptext_end = .); + . = ALIGN(8); + + } > PCP_CMEM AT > PMI_SPRAM /* PCP_CMEM: PCP Code Memory (CMEM) */ /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + /* + * PCP Data Section + */ + .pcpdata : + { + PROVIDE(__pcpdata_start = .); + + /*PROTECTED REGION ID(Protection: iRAM .pcpdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.pcpdata)) /*PCP Data Section*/ + KEEP(*(.pcpdata*)) + + /*PROTECTED REGION ID(Protection: iRAM .pcpdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__pcpdata_end = .); + . = ALIGN(8); + + } > PCP_PRAM AT > PMI_SPRAM /* PCP_PRAM: PCP Data Memory (PRAM) */ /* PMI_SPRAM: Scratch-Pad RAM (SPRAM) */ + + + + + .clear_sec : + { + . = ALIGN(8); + PROVIDE(__clear_table = .) ; + + LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss)); + LONG(0 + ADDR(.sbss)); LONG(SIZEOF(.sbss)); + LONG(0 + ADDR(.zbss)); LONG(SIZEOF(.zbss)); + LONG(0 + ADDR(.bbss)); LONG(SIZEOF(.bbss)); + /*PROTECTED REGION ID(Protection: iRAM clear section) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + LONG(-1); LONG(-1); + + } > PMI_SPRAM + + + .copy_sec : + { + . = ALIGN(8); + PROVIDE(__copy_table = .) ; + + LONG(LOADADDR(.pcptext)); LONG(0 + ADDR(.pcptext)); LONG(SIZEOF(.pcptext)); + LONG(LOADADDR(.pcpdata)); LONG(0 + ADDR(.pcpdata)); LONG(SIZEOF(.pcpdata)); + + /*PROTECTED REGION ID(Protection: iRAM copy section) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + LONG(-1); LONG(-1); LONG(-1); + } > PMI_SPRAM + + .csa (NOLOAD) : + { + . = ALIGN(64); + __CSA_BEGIN = . ; + . += __CSA_SIZE; + . = ALIGN(64); + __CSA_END = .; + } > DMI_LDRAM + + .heap (NOLOAD) : + { + . = ALIGN(8); + __HEAP = .; + . += __HEAP_SIZE; + __HEAP_END = .; + } > DMI_LDRAM + + .istack (NOLOAD) : + { + . = ALIGN(8); + . += __ISTACK_SIZE; + __ISTACK = .; + } > DMI_LDRAM + + .ustack (NOLOAD) : + { + . = ALIGN(8); + . += __USTACK_SIZE; + __USTACK = .; + } > DMI_LDRAM + + /*PROTECTED REGION ID(Protection:iRAM-User-Sections) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + +} + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/ld/iROM.ld b/Demo/TriCore_TC1782_TriBoard_GCC/ld/iROM.ld new file mode 100644 index 000000000..45a99e66e --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/ld/iROM.ld @@ -0,0 +1,655 @@ + +/* + * Name: iROM.ld + * + * Generated Linker Description File + * Copyright (C) 2010 HighTec EDV-Systeme GmbH. + * (!Do not edit outsite of the protection areas!) + * + * Description: + * internal flash configuration + */ + +/* + * Define Entrypoint of Executable + */ +ENTRY(_start) + +/* + * Global + */ +/*Program Flash Memory (PFLASH)*/ +__PMU_PFLASH_BEGIN = 0x80000000; +__PMU_PFLASH_SIZE = 2560K; +/*Data Flash Memory (DFLASH0)*/ +__PMU_DFLASH0_BEGIN = 0xAFE00000; +__PMU_DFLASH0_SIZE = 64K; +/*Data Flash Memory (DFLASH1)*/ +__PMU_DFLASH1_BEGIN = 0xAFE10000; +__PMU_DFLASH1_SIZE = 64K; +/*Boot ROM (BROM)*/ +__BROM_BEGIN = 0xAFFFC000; +__BROM_SIZE = 16K; +/*Scratch-Pad RAM (SPRAM)*/ +__PMI_SPRAM_BEGIN = 0xC0000000; +__PMI_SPRAM_SIZE = 40K; +/*Local Data RAM (LDRAM)*/ +__DMI_LDRAM_BEGIN = 0xD0000000; +__DMI_LDRAM_SIZE = 128K; +/*PCP Code Memory (CMEM)*/ +__PCP_CMEM_BEGIN = 0xF0060000; +__PCP_CMEM_SIZE = 32K; +/*PCP Data Memory (PRAM)*/ +__PCP_PRAM_BEGIN = 0xF0050000; +__PCP_PRAM_SIZE = 16K; + +__ISTACK_SIZE = DEFINED (__ISTACK_SIZE) ? __ISTACK_SIZE : 256; +__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K; +__HEAP_SIZE = DEFINED (__HEAP_SIZE) ? __HEAP_SIZE : 4K ; +__CSA_SIZE = DEFINED (__CSA_SIZE) ? __CSA_SIZE : 16K ; + +/** + * User defined global region + */ +/*PROTECTED REGION ID(Protection:iROM-Global) ENABLED START*/ +/*Protection-Area for your own LDF-Code*/ +/*PROTECTED REGION END*/ + +/* + * internal flash configuration + */ +MEMORY +{ + PMU_PFLASH (rx!p): org = 0x80000000, len = 2560K /*Program Flash Memory (PFLASH)*/ + PMU_DFLASH0 (r!xp): org = 0xAFE00000, len = 64K /*Data Flash Memory (DFLASH0)*/ + PMU_DFLASH1 (r!xp): org = 0xAFE10000, len = 64K /*Data Flash Memory (DFLASH1)*/ + BROM (rx!p): org = 0xAFFFC000, len = 16K /*Boot ROM (BROM)*/ + PMI_SPRAM (wx!p): org = 0xC0000000, len = 40K /*Scratch-Pad RAM (SPRAM)*/ + DMI_LDRAM (w!xp): org = 0xD0000000, len = 128K /*Local Data RAM (LDRAM)*/ + PCP_CMEM (rxp): org = 0xF0060000, len = 32K /*PCP Code Memory (CMEM)*/ + PCP_PRAM (wp!x): org = 0xF0050000, len = 16K /*PCP Data Memory (PRAM)*/ + +} + +SECTIONS +{ + /*Code-Sections*/ + + /* + * Startup code for TriCore + */ + .startup_code : + { + PROVIDE(__startup_code_start = .); + + /*PROTECTED REGION ID(Protection: iROM .startup_code.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.startup_code) /*Startup code for TriCore*/ + *(.startup_code*) + + /*PROTECTED REGION ID(Protection: iROM .startup_code) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__startup_code_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Code section + */ + .text : + { + PROVIDE(__text_start = .); + + /*PROTECTED REGION ID(Protection: iROM .text.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.text) /*Code section*/ + *(.text*) + *(.gnu.linkonce.t.*) + + /*PROTECTED REGION ID(Protection: iROM .text) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__text_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Code executed before calling main + */ + .init : + { + PROVIDE(__init_start = .); + + /*PROTECTED REGION ID(Protection: iROM .init.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.init)) /*Code executed before calling main*/ + KEEP(*(.init*)) + + /*PROTECTED REGION ID(Protection: iROM .init) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__init_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Code executed before exiting program + */ + .fini : + { + PROVIDE(__fini_start = .); + + /*PROTECTED REGION ID(Protection: iROM .fini.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.fini)) /*Code executed before exiting program*/ + KEEP(*(.fini*)) + + /*PROTECTED REGION ID(Protection: iROM .fini) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__fini_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Section for trap table + */ + .traptab : + { + PROVIDE(__traptab_start = .); + + /*PROTECTED REGION ID(Protection: iROM .traptab.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.traptab) /*Section for trap table*/ + *(.traptab*) + + /*PROTECTED REGION ID(Protection: iROM .traptab) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__traptab_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Section for interrupt table + */ + .inttab : + { + PROVIDE(__inttab_start = .); + + /*PROTECTED REGION ID(Protection: iROM .inttab.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.inttab) /*Section for interrupt table*/ + *(.inttab*) + + /*PROTECTED REGION ID(Protection: iROM .inttab) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__inttab_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Exception handling frame for C++ exceptions + */ + .eh_frame : + { + PROVIDE(__eh_frame_start = .); + + /*PROTECTED REGION ID(Protection: iROM .eh_frame.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.eh_frame) /*Exception handling frame for C++ exceptions*/ + *(.eh_frame*) + + /*PROTECTED REGION ID(Protection: iROM .eh_frame) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__eh_frame_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Section for constructors + */ + .ctors : + { + PROVIDE(__ctors_start = .); + + /*PROTECTED REGION ID(Protection: iROM .ctors.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.ctors)) /*Section for constructors*/ + KEEP(*(.ctors*)) + + /*PROTECTED REGION ID(Protection: iROM .ctors) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__ctors_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Section for destructors + */ + .dtors : + { + PROVIDE(__dtors_start = .); + + /*PROTECTED REGION ID(Protection: iROM .dtors.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.dtors)) /*Section for destructors*/ + KEEP(*(.dtors*)) + + /*PROTECTED REGION ID(Protection: iROM .dtors) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__dtors_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + + /*Absolute Data-Sections*/ + + /* + * Initialised data addressed as absolute + */ + .zdata : + { + PROVIDE(__zdata_start = .); + + /*PROTECTED REGION ID(Protection: iROM .zdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.zdata) /*Initialised data addressed as absolute*/ + *(.zdata*) + *(.gnu.linkonce.z.*) + *(.gnu.linkonce.zr.*) + + /*PROTECTED REGION ID(Protection: iROM .zdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__zdata_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not initialised data addressed as absolute + */ + .zbss (NOLOAD) : + { + PROVIDE(__zbss_start = .); + + /*PROTECTED REGION ID(Protection: iROM .zbss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.zbss) /*Not Initialised data addressed as absolute*/ + *(.zbss*) + *(.gnu.linkonce.zb.*) + + /*PROTECTED REGION ID(Protection: iROM .zbss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__zbss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not initialised bit data + */ + .bbss (NOLOAD) : + { + PROVIDE(__bbss_start = .); + + /*PROTECTED REGION ID(Protection: iROM .bbss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.bbss) /*Not initialised bit data*/ + *(.bbss*) + + /*PROTECTED REGION ID(Protection: iROM .bbss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__bbss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Bit variables + */ + .bdata : + { + PROVIDE(__bdata_start = .); + + /*PROTECTED REGION ID(Protection: iROM .bdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.bdata) /*Bit variables*/ + *(.bdata*) + + /*PROTECTED REGION ID(Protection: iROM .bdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__bdata_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + + /*Small Data-Sections*/ + + /* + * Storage of write-protected data addressed as small + */ + .sdata2 : + { + PROVIDE(__sdata2_start = .); + + /*PROTECTED REGION ID(Protection: iROM .sdata2.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.sdata.rodata) /*Storage of write-protected data addressed as small*/ + *(.sdata.rodata*) + *(.gnu.linkonce.sr.*) + + /*PROTECTED REGION ID(Protection: iROM .sdata2) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__sdata2_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Section stores initialised data which is addressable by small data area pointer (%a0) + */ + .sdata : + { + PROVIDE(__sdata_start = .); + + /*PROTECTED REGION ID(Protection: iROM .sdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.sdata) /*Section stores initialised data which is addressable by small data area pointer (%a0)*/ + *(.sdata*) + *(.gnu.linkonce.s.*) + + /*PROTECTED REGION ID(Protection: iROM .sdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__sdata_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0) + */ + .sbss (NOLOAD) : + { + PROVIDE(__sbss_start = .); + + /*PROTECTED REGION ID(Protection: iROM .sbss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.sbss) /*Not initialised data in section ’.sbss’, addressable by small data area pointer (%a0)*/ + *(.sbss*) + *(.gnu.linkonce.sb.*) + + /*PROTECTED REGION ID(Protection: iROM .sbss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__sbss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + + /*Normal Data-Sections*/ + + /* + * Storage of write-protected data + */ + .rodata : + { + PROVIDE(__rodata_start = .); + + /*PROTECTED REGION ID(Protection: iROM .rodata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.rodata) /*Storage of write-protected data*/ + *(.rodata*) + *(.gnu.linkonce.r.*) + *(.jcr.*) + + /*PROTECTED REGION ID(Protection: iROM .rodata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__rodata_end = .); + . = ALIGN(8); + + } > PMU_PFLASH /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * Initialised data + */ + .data : + { + PROVIDE(__data_start = .); + + /*PROTECTED REGION ID(Protection: iROM .data.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.data) /*Initialised data*/ + *(.data*) + *(.gnu.linkonce.d.*) + + /*PROTECTED REGION ID(Protection: iROM .data) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__data_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + /* + * Not Initialised data + */ + .bss (NOLOAD) : + { + PROVIDE(__bss_start = .); + + /*PROTECTED REGION ID(Protection: iROM .bss.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + *(.bss) /*Not Initialised data*/ + *(.bss*) + *(.gnu.linkonce.b.*) + + /*PROTECTED REGION ID(Protection: iROM .bss) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__bss_end = .); + . = ALIGN(8); + + } > DMI_LDRAM /* DMI_LDRAM: Local Data RAM (LDRAM) */ + + + + /*PCP-Sections*/ + + /* + * PCP Code Section + */ + .pcptext : + { + PROVIDE(__pcptext_start = .); + + /*PROTECTED REGION ID(Protection: iROM .pcptext.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.pcptext)) /*PCP Code Section*/ + KEEP(*(.pcptext*)) + + /*PROTECTED REGION ID(Protection: iROM .pcptext) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__pcptext_end = .); + . = ALIGN(8); + + } > PCP_CMEM AT > PMU_PFLASH /* PCP_CMEM: PCP Code Memory (CMEM) */ /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + /* + * PCP Data Section + */ + .pcpdata : + { + PROVIDE(__pcpdata_start = .); + + /*PROTECTED REGION ID(Protection: iROM .pcpdata.begin) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + KEEP(*(.pcpdata)) /*PCP Data Section*/ + KEEP(*(.pcpdata*)) + + /*PROTECTED REGION ID(Protection: iROM .pcpdata) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + + PROVIDE(__pcpdata_end = .); + . = ALIGN(8); + + } > PCP_PRAM AT > PMU_PFLASH /* PCP_PRAM: PCP Data Memory (PRAM) */ /* PMU_PFLASH: Program Flash Memory (PFLASH) */ + + + + + .clear_sec : + { + . = ALIGN(8); + PROVIDE(__clear_table = .) ; + + LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss)); + LONG(0 + ADDR(.sbss)); LONG(SIZEOF(.sbss)); + LONG(0 + ADDR(.zbss)); LONG(SIZEOF(.zbss)); + LONG(0 + ADDR(.bbss)); LONG(SIZEOF(.bbss)); + /*PROTECTED REGION ID(Protection: iROM clear section) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + LONG(-1); LONG(-1); + + } > PMU_PFLASH + + + .copy_sec : + { + . = ALIGN(8); + PROVIDE(__copy_table = .) ; + + LONG(LOADADDR(.pcptext)); LONG(0 + ADDR(.pcptext)); LONG(SIZEOF(.pcptext)); + LONG(LOADADDR(.pcpdata)); LONG(0 + ADDR(.pcpdata)); LONG(SIZEOF(.pcpdata)); + + /*PROTECTED REGION ID(Protection: iROM copy section) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + LONG(-1); LONG(-1); LONG(-1); + } > PMU_PFLASH + + .csa (NOLOAD) : + { + . = ALIGN(64); + __CSA_BEGIN = . ; + . += __CSA_SIZE; + . = ALIGN(64); + __CSA_END = .; + } > DMI_LDRAM + + .heap (NOLOAD) : + { + . = ALIGN(8); + __HEAP = .; + . += __HEAP_SIZE; + __HEAP_END = .; + } > DMI_LDRAM + + .istack (NOLOAD) : + { + . = ALIGN(8); + . += __ISTACK_SIZE; + __ISTACK = .; + } > DMI_LDRAM + + .ustack (NOLOAD) : + { + . = ALIGN(8); + . += __USTACK_SIZE; + __USTACK = .; + } > DMI_LDRAM + + /*PROTECTED REGION ID(Protection:iROM-User-Sections) ENABLED START*/ + /*Protection-Area for your own LDF-Code*/ + /*PROTECTED REGION END*/ + +} + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/models/.parts/ldf_configuration.lm b/Demo/TriCore_TC1782_TriBoard_GCC/models/.parts/ldf_configuration.lm new file mode 100644 index 000000000..907eb9f67 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/models/.parts/ldf_configuration.lm @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/models/TriBoard-TC1782.mdm b/Demo/TriCore_TC1782_TriBoard_GCC/models/TriBoard-TC1782.mdm new file mode 100644 index 000000000..ebb26b0ed --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/models/TriBoard-TC1782.mdm @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + + + + + + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/models/iRAM.lm b/Demo/TriCore_TC1782_TriBoard_GCC/models/iRAM.lm new file mode 100644 index 000000000..4cf87442a --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/models/iRAM.lm @@ -0,0 +1,124 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Demo/TriCore_TC1782_TriBoard_GCC/models/iROM.lm b/Demo/TriCore_TC1782_TriBoard_GCC/models/iROM.lm new file mode 100644 index 000000000..f5b0da011 --- /dev/null +++ b/Demo/TriCore_TC1782_TriBoard_GCC/models/iROM.lm @@ -0,0 +1,124 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- 2.39.5