From a0858bfed053fa4555d729554ad8b8089a7ac308 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=C3=98yvind=20Harboe?= Date: Mon, 31 Jan 2011 10:30:48 +0100 Subject: [PATCH] cfi: use ARM32 machine code on all CPUs but Cortex M3 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit ARM11 broke with aa61a3b3d8b6acad19050987835ec05f3d298bdb as the code only checked for arm 7/9. CFI probably needs work for non-ARM targets but perhaps not adding working area memory to e.g. MIPS will give the default slow CFI support. Signed-off-by: Øyvind Harboe --- src/flash/nor/cfi.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index f462d721..1fa3f2da 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -1651,17 +1651,13 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, armv4_5_info.core_mode = ARMV7M_MODE_HANDLER; armv4_5_info.core_state = ARM_STATE_ARM; } - else if (is_arm7_9(target_to_arm7_9(target))) + else { + /* All other ARM CPUs have 32 bit instructions */ armv4_5_info.common_magic = ARM_COMMON_MAGIC; armv4_5_info.core_mode = ARM_MODE_SVC; armv4_5_info.core_state = ARM_STATE_ARM; } - else - { - /* fallback to slow writes */ - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - } int target_code_size = 0; const uint32_t *target_code_src = NULL; -- 2.39.5