From a7476505a8dfdeb1fe5c6732d4f0826ccfba4ac5 Mon Sep 17 00:00:00 2001 From: cuz Date: Fri, 26 Aug 2005 12:46:44 +0000 Subject: [PATCH] Added the "none" CPU. git-svn-id: svn://svn.cc65.org/cc65/trunk@3592 b7a2c559-68d2-44c3-8de9-860c34a00d81 --- src/ca65/instr.c | 16 ++++++++++++++++ src/ca65/instr.h | 36 ++++++++++++++++++------------------ src/ca65/macpack/cpu.mac | 18 ++++++++++-------- 3 files changed, 44 insertions(+), 26 deletions(-) diff --git a/src/ca65/instr.c b/src/ca65/instr.c index 1cfc5ba30..710944e49 100644 --- a/src/ca65/instr.c +++ b/src/ca65/instr.c @@ -83,6 +83,13 @@ static void PutSweet16Branch (const InsDesc* Ins); +/* Empty instruction table */ +static const struct { + unsigned Count; +} InsTabNone = { + 0 +}; + /* Instruction table for the 6502 */ #define INS_COUNT_6502 56 static const struct { @@ -575,6 +582,7 @@ static const struct { /* An array with instruction tables */ static const InsTable* InsTabs[CPU_COUNT] = { + (const InsTable*) &InsTabNone, (const InsTable*) &InsTab6502, (const InsTable*) &InsTab6502X, (const InsTable*) &InsTab65SC02, @@ -1136,6 +1144,14 @@ int FindInstruction (const char* Ident) const InsDesc* ID; char Key[sizeof (ID->Mnemonic)]; + /* Shortcut for the "none" CPU: If there are no instructions to search + * for, bail out early. + */ + if (InsTab->Count == 0) { + /* Not found */ + return -1; + } + /* Make a copy, and uppercase that copy */ I = 0; while (Ident[I] != '\0') { diff --git a/src/ca65/instr.h b/src/ca65/instr.h index 4fa99090d..b9706ce84 100644 --- a/src/ca65/instr.h +++ b/src/ca65/instr.h @@ -57,32 +57,32 @@ * When assembling for the 6502 or 65C02, all addressing modes that are not * available on these CPUs are removed before doing any checks. */ -#define AM65_IMPLICIT 0x00000003UL -#define AM65_ACCU 0x00000002UL +#define AM65_IMPLICIT 0x00000003UL +#define AM65_ACCU 0x00000002UL #define AM65_DIR 0x00000004UL #define AM65_ABS 0x00000008UL #define AM65_ABS_LONG 0x00000010UL #define AM65_DIR_X 0x00000020UL #define AM65_ABS_X 0x00000040UL #define AM65_ABS_LONG_X 0x00000080UL -#define AM65_DIR_Y 0x00000100UL -#define AM65_ABS_Y 0x00000200UL -#define AM65_DIR_IND 0x00000400UL -#define AM65_ABS_IND 0x00000800UL -#define AM65_DIR_IND_LONG 0x00001000UL -#define AM65_DIR_IND_Y 0x00002000UL -#define AM65_DIR_IND_LONG_Y 0x00004000UL -#define AM65_DIR_X_IND 0x00008000UL -#define AM65_ABS_X_IND 0x00010000UL -#define AM65_REL 0x00020000UL -#define AM65_REL_LONG 0x00040000UL -#define AM65_STACK_REL 0x00080000UL -#define AM65_STACK_REL_IND_Y 0x00100000UL +#define AM65_DIR_Y 0x00000100UL +#define AM65_ABS_Y 0x00000200UL +#define AM65_DIR_IND 0x00000400UL +#define AM65_ABS_IND 0x00000800UL +#define AM65_DIR_IND_LONG 0x00001000UL +#define AM65_DIR_IND_Y 0x00002000UL +#define AM65_DIR_IND_LONG_Y 0x00004000UL +#define AM65_DIR_X_IND 0x00008000UL +#define AM65_ABS_X_IND 0x00010000UL +#define AM65_REL 0x00020000UL +#define AM65_REL_LONG 0x00040000UL +#define AM65_STACK_REL 0x00080000UL +#define AM65_STACK_REL_IND_Y 0x00100000UL #define AM65_IMM_ACCU 0x00200000UL #define AM65_IMM_INDEX 0x00400000UL -#define AM65_IMM_IMPLICIT 0x00800000UL -#define AM65_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT) -#define AM65_BLOCKMOVE 0x01000000UL +#define AM65_IMM_IMPLICIT 0x00800000UL +#define AM65_IMM (AM65_IMM_ACCU | AM65_IMM_INDEX | AM65_IMM_IMPLICIT) +#define AM65_BLOCKMOVE 0x01000000UL /* Bitmask for all ZP operations that have correspondent ABS ops */ #define AM65_SET_ZP (AM65_DIR | AM65_DIR_X | AM65_DIR_Y | AM65_DIR_IND | AM65_DIR_X_IND) diff --git a/src/ca65/macpack/cpu.mac b/src/ca65/macpack/cpu.mac index f7698954a..29abd5b69 100644 --- a/src/ca65/macpack/cpu.mac +++ b/src/ca65/macpack/cpu.mac @@ -1,14 +1,16 @@ ; CPU bitmask constants -CPU_ISET_6502 = $01 -CPU_ISET_6502X = $02 -CPU_ISET_65SC02 = $04 -CPU_ISET_65C02 = $08 -CPU_ISET_65816 = $10 -CPU_ISET_SUNPLUS = $20 -CPU_ISET_SWEET16 = $40 +CPU_ISET_NONE = $01 +CPU_ISET_6502 = $02 +CPU_ISET_6502X = $04 +CPU_ISET_65SC02 = $08 +CPU_ISET_65C02 = $10 +CPU_ISET_65816 = $20 +CPU_ISET_SUNPLUS = $40 +CPU_ISET_SWEET16 = $80 -; CPU capabilities +; CPU capabilities +CPU_NONE = CPU_ISET_NONE CPU_6502 = CPU_ISET_6502 CPU_6502X = CPU_ISET_6502|CPU_ISET_6502X CPU_65SC02 = CPU_ISET_6502|CPU_ISET_65SC02 -- 2.39.5