From a80bf5e46e6f808e4f5ee18d85c49097b0909937 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sat, 20 Jan 2018 19:16:03 +0100 Subject: [PATCH] dm: ram: bmips: add BCM6318 support MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Daniel Schwierzeck --- drivers/ram/bmips_ram.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c index 3f9d9a8566..7a5dfac4ab 100644 --- a/drivers/ram/bmips_ram.c +++ b/drivers/ram/bmips_ram.c @@ -23,6 +23,8 @@ #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT) #define SDRAM_CFG_BANK_SHIFT 13 #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT) +#define SDRAM_6318_SPACE_SHIFT 4 +#define SDRAM_6318_SPACE_MASK (0xf << SDRAM_6318_SPACE_SHIFT) #define MEMC_CFG_REG 0x4 #define MEMC_CFG_32B_SHIFT 1 @@ -45,6 +47,16 @@ struct bmips_ram_priv { const struct bmips_ram_hw *hw; }; +static ulong bcm6318_get_ram_size(struct bmips_ram_priv *priv) +{ + u32 val; + + val = readl_be(priv->regs + SDRAM_CFG_REG); + val = (val & SDRAM_6318_SPACE_MASK) >> SDRAM_6318_SPACE_SHIFT; + + return (1 << (val + 20)); +} + static ulong bcm6328_get_ram_size(struct bmips_ram_priv *priv) { return readl_be(priv->regs + DDR_CSEND_REG) << 24; @@ -102,6 +114,10 @@ static const struct ram_ops bmips_ram_ops = { .get_info = bmips_ram_get_info, }; +static const struct bmips_ram_hw bmips_ram_bcm6318 = { + .get_ram_size = bcm6318_get_ram_size, +}; + static const struct bmips_ram_hw bmips_ram_bcm6328 = { .get_ram_size = bcm6328_get_ram_size, }; @@ -116,6 +132,9 @@ static const struct bmips_ram_hw bmips_ram_bcm6358 = { static const struct udevice_id bmips_ram_ids[] = { { + .compatible = "brcm,bcm6318-mc", + .data = (ulong)&bmips_ram_bcm6318, + }, { .compatible = "brcm,bcm6328-mc", .data = (ulong)&bmips_ram_bcm6328, }, { -- 2.39.5