From b3b3578f0888c1f224708dc23f2d8dc7878ef807 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Stephan=20M=C3=BChlstrasser?= Date: Sun, 14 Jul 2013 22:50:38 +0200 Subject: [PATCH] Nominal support for target Ohio Scientific Challenger 1P --- cfg/c1p.cfg | 30 +++++++++++++++++++++++++ libsrc/Makefile | 1 + libsrc/c1p/crt0.s | 54 +++++++++++++++++++++++++++++++++++++++++++++ src/ca65/main.c | 4 ++++ src/cc65/main.c | 4 ++++ src/common/target.c | 4 +++- src/common/target.h | 1 + 7 files changed, 97 insertions(+), 1 deletion(-) create mode 100644 cfg/c1p.cfg create mode 100644 libsrc/c1p/crt0.s diff --git a/cfg/c1p.cfg b/cfg/c1p.cfg new file mode 100644 index 000000000..752e81533 --- /dev/null +++ b/cfg/c1p.cfg @@ -0,0 +1,30 @@ +SYMBOLS { + __STACKSIZE__: type = weak, value = $0400; # 1k stack +} +MEMORY { + ZP: file = "", define = yes, start = $0002, size = $001A; + LOADADDR: file = %O, start = $0FFF, size = $0002; + HEADER: file = %O, start = $1001, size = $000C; + RAM: file = %O, define = yes, start = $100D, size = $0DF3 - __STACKSIZE__; +} +SEGMENTS { + STARTUP: load = RAM, type = ro; + LOWCODE: load = RAM, type = ro, optional = yes; + INIT: load = RAM, type = ro, define = yes, optional = yes; + CODE: load = RAM, type = ro; + RODATA: load = RAM, type = ro; + DATA: load = RAM, type = rw; + ZPSAVE: load = RAM, type = bss; + BSS: load = RAM, type = bss, define = yes; + ZEROPAGE: load = ZP, type = zp; +} +FEATURES { + CONDES: type = constructor, + label = __CONSTRUCTOR_TABLE__, + count = __CONSTRUCTOR_COUNT__, + segment = INIT; + CONDES: type = destructor, + label = __DESTRUCTOR_TABLE__, + count = __DESTRUCTOR_COUNT__, + segment = RODATA; +} diff --git a/libsrc/Makefile b/libsrc/Makefile index d855d1580..9955d6d77 100644 --- a/libsrc/Makefile +++ b/libsrc/Makefile @@ -15,6 +15,7 @@ TARGETS = apple2 \ atari \ atarixl \ atmos \ + c1p \ $(CBMS) \ $(GEOS) \ lynx \ diff --git a/libsrc/c1p/crt0.s b/libsrc/c1p/crt0.s new file mode 100644 index 000000000..f8005b6dd --- /dev/null +++ b/libsrc/c1p/crt0.s @@ -0,0 +1,54 @@ +; --------------------------------------------------------------------------- +; crt0.s +; --------------------------------------------------------------------------- +; +; Startup code for Ohio Scientific Challenger 1P + +.export _init, _exit +.import _main + +.export __STARTUP__ : absolute = 1 ; Mark as startup +.import __RAM_START__, __RAM_SIZE__ ; Linker generated + +.import copydata, zerobss, initlib, donelib + +.include "zeropage.inc" + +; --------------------------------------------------------------------------- +; Place the startup code in a special segment + +.segment "STARTUP" + +; --------------------------------------------------------------------------- +; A little light 6502 housekeeping + +_init: LDX #$FF ; Initialize stack pointer to $01FF + TXS + CLD ; Clear decimal mode + +; --------------------------------------------------------------------------- +; Set cc65 argument stack pointer + + LDA #<(__RAM_START__ + __RAM_SIZE__) + STA sp + LDA #>(__RAM_START__ + __RAM_SIZE__) + STA sp+1 + +; --------------------------------------------------------------------------- +; Initialize memory storage + + ; JSR zerobss ; Clear BSS segment + ; JSR copydata ; Initialize DATA segment + ; JSR initlib ; Run constructors + +; --------------------------------------------------------------------------- +; Call main() + + JSR _main + +; --------------------------------------------------------------------------- +; Back from main (this is also the _exit entry): force a software break + +_exit: JSR donelib ; Run destructors + BRK + diff --git a/src/ca65/main.c b/src/ca65/main.c index 4b2f9d178..5a9bf7083 100644 --- a/src/ca65/main.c +++ b/src/ca65/main.c @@ -298,6 +298,10 @@ static void SetSys (const char* Sys) NewSymbol ("__SIM65C02__", 1); break; + case TGT_C1P: + NewSymbol ("__OSIC1P__", 1); + break; + default: AbEnd ("Invalid target name: `%s'", Sys); diff --git a/src/cc65/main.c b/src/cc65/main.c index a27822ed8..6882d56a3 100644 --- a/src/cc65/main.c +++ b/src/cc65/main.c @@ -254,6 +254,10 @@ static void SetSys (const char* Sys) DefineNumericMacro ("__SIM65C02__", 1); break; + case TGT_C1P: + DefineNumericMacro ("__OSIC1P__", 1); + break; + default: AbEnd ("Unknown target system type %d", Target); } diff --git a/src/common/target.c b/src/common/target.c index a4287ee56..d8d3f9c54 100644 --- a/src/common/target.c +++ b/src/common/target.c @@ -119,7 +119,7 @@ struct TargetEntry { }; /* Table that maps target names to ids. Sorted alphabetically for bsearch. - * Allows mupltiple entries for one target id (target name aliases). + * Allows multiple entries for one target id (target name aliases). */ static const TargetEntry TargetMap[] = { { "apple2", TGT_APPLE2 }, @@ -130,6 +130,7 @@ static const TargetEntry TargetMap[] = { { "bbc", TGT_BBC }, { "c128", TGT_C128 }, { "c16", TGT_C16 }, + { "c1p", TGT_C1P }, { "c64", TGT_C64 }, { "cbm510", TGT_CBM510 }, { "cbm610", TGT_CBM610 }, @@ -160,6 +161,7 @@ static const TargetProperties PropertyTable[TGT_COUNT] = { { "atarixl", CPU_6502, BINFMT_BINARY, CTAtari }, { "vic20", CPU_6502, BINFMT_BINARY, CTPET }, { "c16", CPU_6502, BINFMT_BINARY, CTPET }, + { "c1p", CPU_6502, BINFMT_BINARY, CTNone }, { "c64", CPU_6502, BINFMT_BINARY, CTPET }, { "c128", CPU_6502, BINFMT_BINARY, CTPET }, { "plus4", CPU_6502, BINFMT_BINARY, CTPET }, diff --git a/src/common/target.h b/src/common/target.h index e1675ad65..47946a309 100644 --- a/src/common/target.h +++ b/src/common/target.h @@ -58,6 +58,7 @@ typedef enum { TGT_ATARIXL, TGT_VIC20, TGT_C16, + TGT_C1P, TGT_C64, TGT_C128, TGT_PLUS4, -- 2.39.5