From b8de323da0ab2bcc2e044b9ed373a7faac8cd8f8 Mon Sep 17 00:00:00 2001
From: richardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Sun, 9 Aug 2009 13:03:17 +0000
Subject: [PATCH] Increase frequency to 99MHz.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@842 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---
 Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c b/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
index ccabf42eb..750bc7932 100644
--- a/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
+++ b/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
@@ -279,7 +279,7 @@ void prvSetupHardware( void )
 	/* select main OSC, 12MHz, as the PLL clock source. */
 	SC->CLKSRCSEL = 0x1;		
 	
-	SC->PLL0CFG = 0x0b;
+	SC->PLL0CFG = 0x20031;
 	SC->PLL0FEED = PLLFEED_FEED1;
 	SC->PLL0FEED = PLLFEED_FEED2;
 	      
@@ -292,7 +292,7 @@ void prvSetupHardware( void )
 	SC->CCLKCFG = 0x03;
 	
 	/* Configure flash accelerator. */
-	SC->FLASHCFG = 0x303a;
+	SC->FLASHCFG = 0x403a;
 	
 	/* Check lock bit status. */
 	while( ( ( SC->PLL0STAT & ( 1 << 26 ) ) == 0 ) );	
-- 
2.39.5