From b8f7cb6ae31d3c2de7349e58889ed3c5a1a77c42 Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Sun, 3 Aug 2014 05:32:49 +0300 Subject: [PATCH] sunxi: dram: Improve DQS gate data training error handling The stale error status should be cleared for all sun4i/sun5i/sun7i hardware and not just for sun7i. Also there are two types of DQS gate training errors ("found no result" and "found more than one possible result"). Both are handled now. Signed-off-by: Siarhei Siamashka Acked-by: Ian Campbell Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/sunxi/dram.c | 2 -- arch/arm/include/asm/arch-sunxi/dram.h | 4 +++- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c index 6f98c6a3bb..47017d2df1 100644 --- a/arch/arm/cpu/armv7/sunxi/dram.c +++ b/arch/arm/cpu/armv7/sunxi/dram.c @@ -357,9 +357,7 @@ static int dramc_scan_readpipe(void) u32 reg_val; /* data training trigger */ -#ifdef CONFIG_SUN7I clrbits_le32(&dram->csr, DRAM_CSR_FAILED); -#endif setbits_le32(&dram->ccr, DRAM_CCR_DATA_TRAINING); /* check whether data training process has completed */ diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index 3c2925625d..11e35077f4 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -133,7 +133,9 @@ struct dram_para { #define DRAM_DCR_MODE_SEQ 0x0 #define DRAM_DCR_MODE_INTERLEAVE 0x1 -#define DRAM_CSR_FAILED (0x1 << 20) +#define DRAM_CSR_DTERR (0x1 << 20) +#define DRAM_CSR_DTIERR (0x1 << 21) +#define DRAM_CSR_FAILED (DRAM_CSR_DTERR | DRAM_CSR_DTIERR) #define DRAM_DRR_TRFC(n) ((n) & 0xff) #define DRAM_DRR_TREFI(n) (((n) & 0xffff) << 8) -- 2.39.5