From bc2e0fa84db4d61638eacf627353d62ae6262ef5 Mon Sep 17 00:00:00 2001 From: richardbarry Date: Sun, 27 Dec 2009 09:55:16 +0000 Subject: [PATCH] Start a new demo for a new SH2A port. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@943 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- Demo/SuperH_SH7216_Renesas/RTOSDemo.hws | 41 +++ Demo/SuperH_SH7216_Renesas/RTOSDemo.tws | 15 + .../SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c | 15 + .../RTOSDemo/RTOSDemo.hwp | 163 +++++++++ .../RTOSDemo/RTOSDemo.nav | Bin 0 -> 6295 bytes .../RTOSDemo/RTOSDemo.pgs | 35 ++ .../RTOSDemo/RTOSDemo.tps | 20 ++ .../SessionSH7216_E10A-USB_SYSTEM__SH.hsf | 324 ++++++++++++++++++ .../SessionSH7216_E10A-USB_SYSTEM__SH.ini | 4 + ...216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini | 3 + Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c | 30 ++ Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c | 22 ++ Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c | 15 + .../SuperH_SH7216_Renesas/RTOSDemo/resetprg.c | 106 ++++++ .../SuperH_SH7216_Renesas/RTOSDemo/stacksct.h | 11 + .../RTOSDemo/typedefine.h | 23 ++ Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h | 37 ++ Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c | 39 +++ 18 files changed, 903 insertions(+) create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo.hws create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo.tws create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.nav create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.pgs create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.tps create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.hsf create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h create mode 100644 Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo.hws b/Demo/SuperH_SH7216_Renesas/RTOSDemo.hws new file mode 100644 index 000000000..b679a05d4 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo.hws @@ -0,0 +1,41 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"11.0" +[WORKSPACE_DETAILS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo.hws" "SuperH RISC engine" "Renesas SuperH Standard" +[SHARED_WORKSPACE_CONTROL_STATUS] +"" "" "" +"" "" "" +[PROJECTS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\RTOSDemo.hwp" 0 +[INFORMATION] +"No workspace information available" +[SCRAP] +[PROJECT_DEPENDENCY] +[WORKSPACE_PROPERTIES] +[HELP_FILES] +"c:\devtools\renesas\hew\tools\renesas\sh\9_3_2\hew\stdlib.chm" "C/C++ Standard Library Help" 1 +[GENERAL_DATA_PROJECT] +[USERMENUTOOLS] +[CUSTOMPLACEHOLDERS] +[MAKEFILE_BUILD_INFO] +"$(WORKSPDIR)\make\$(PROJECTNAME)_$(CONFIGNAME).mak" "" "$(WORKSPDIR)\make" 0 0 0 +[VD_CONFIGURATION_OPTIONS] +"ACTIVE_DESKTOP" "0" +[VD_CONFIGURATIONS] +"0" "Default1" "1" +"1" "Default2" "1" +"2" "Default3" "1" +"3" "Default4" "1" +[OPTIONS_DEBUG_TAB] +0 0 0 0 0 +[VCS] +"" "" "" 0 +[VCS_PROJECT] +[MAKEFILE_ENV_STRINGS] +[MAKEFILE_ENV_FLAGS] +1 0 0 +[MAKEFILE_CLEAN_INFO] +"" +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo.tws b/Demo/SuperH_SH7216_Renesas/RTOSDemo.tws new file mode 100644 index 000000000..d401e2ca9 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo.tws @@ -0,0 +1,15 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"1.2" +[CURRENT_PROJECT] +"RTOSDemo" +[GENERAL_DATA] +[BREAKPOINTS] +[OPEN_WORKSPACE_FILES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\main.c" +[WORKSPACE_FILE_STATES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\main.c" -4 -23 1400 586 1 0 +[LOADED_PROJECTS] +"RTOSDemo" +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c new file mode 100644 index 000000000..03891c5c2 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c @@ -0,0 +1,15 @@ + +void main(void); + +void main(void) +{ +volatile unsigned long ul; + + for( ;; ) + { + ul++; + ul++; + } +} + + diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp new file mode 100644 index 000000000..c3fcd4cae --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp @@ -0,0 +1,163 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"2.8" +[PROJECT_DETAILS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\RTOSDemo.hwp" "SuperH RISC engine" "Renesas SuperH Standard" "Application" "SH2A-FPU" "Other" +[INFORMATION] +"No project information available" +[TOOL_CHAIN] +"Renesas SuperH RISC engine Standard Toolchain" "9.3.2.0" +[CONFIGURATIONS] +"Debug_SH7216_E10A-USB_SYSTEM__SH" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\Debug_SH7216_E10A-USB_SYSTEM__SH" +[BUILD_PHASES] +"Renesas OptLinker" 1 +"Renesas SH Assembler" 1 +"Renesas SH C/C++ Compiler" 1 +"Renesas SH C/C++ Library Generator" 1 +[TOOL_ENVIRONMENT] +[EXTENSIONS] +"Absolute file" "ABS" +"Assembly include file" "INC" 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include object file" "BIN" "NONE" "" +[ASSOCIATED_APPLICATIONS] +[TOOLCHAIN_PHASE] +"Renesas OptLinker" +"Renesas SH Assembler" +"Renesas SH C/C++ Compiler" +"Renesas SH C/C++ Library Generator" +[UTILITY_PHASE] +[CUSTOM_PHASES] +[CUSTOM_PHASE_INPUT_GROUP] +[CUSTOM_PHASE_OUTPUT_SYNTAX] +[BUILD_ORDER] +"Renesas SH C/C++ Library Generator" 1 +"Renesas SH C/C++ Compiler" 1 +"Renesas SH Assembler" 1 +"Renesas OptLinker" 1 +[BUILD_PHASE_DETAILS] +"Renesas OptLinker" "Object file|Library file|Relocatable file" 0 +"Renesas SH Assembler" "Assembly source file|Linkage symbol file" 1 +"Renesas SH C/C++ Compiler" "C source file|C++ source file" 1 +"Renesas SH C/C++ Library Generator" "" 0 +[BUILD_FILE_ORDER_Assembly source file] +"Renesas SH Assembler" 1 +[BUILD_FILE_ORDER_C source file] +"Renesas SH C/C++ Compiler" 1 +[BUILD_FILE_ORDER_C++ source file] +"Renesas SH C/C++ Compiler" 1 +[BUILD_FILE_ORDER_Linkage symbol file] +"Renesas SH Assembler" 1 +[SCRAP] +"Project Generator Setup File" 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+[STATUSBAR_STATEINFO_VD3] +"MasterShowState" 1 +"ApplicationShowState" 1 +"DebuggerShowState" 1 +[STATUSBAR_STATEINFO_VD4] +"MasterShowState" 1 +"ApplicationShowState" 1 +"DebuggerShowState" 1 +[STATUSBAR_DEBUGGER_PANESTATE_VD1] +[STATUSBAR_DEBUGGER_PANESTATE_VD2] +[STATUSBAR_DEBUGGER_PANESTATE_VD3] +[STATUSBAR_DEBUGGER_PANESTATE_VD4] +[DEBUGGER_OPTIONS] +"[B|SIMIOF|1] [I|SIMIOADR|0x00000000] [S|ROM_MODE|^"^"] [S|MAP|^"^"] [S|RESOURCE|^"^"]" +[DOWNLOAD_MODULES] +"$(CONFIGDIR)\$(PROJECTNAME).abs" 0 "Elf/Dwarf2" 0 0 1 0 +[CONNECT_ON_GO] +"FALSE" +[DOWNLOAD_MODULES_AFTER_BUILD] +"TRUE" +[REMOVE_BREAKPOINTS_ON_DOWNLOAD] +"FALSE" +[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION] +"FALSE" +[LIMIT_DISASSEMBLY_MEMORY_ACCESS] +"TRUE" +[DISABLE_MEMORY_ACCESS_DURING_EXECUTION] +"FALSE" +[DEBUGGER_OPTIONS_PROPERTIES] +"1" +[COMMAND_FILES] +[DEFAULT_DEBUG_FORMAT] +"Elf/Dwarf2" +[FLASH_DETAILS] +"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" +[BREAKPOINTS] +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini new file mode 100644 index 000000000..4f273cfef --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini @@ -0,0 +1,4 @@ +[E10A USB Cpu Select] +FREQUENCY=12.50 +[Key] +Key=1 diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini new file mode 100644 index 000000000..b82cebe4b --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini @@ -0,0 +1,3 @@ +[E10A USB Cpu Select] +CPU Select=5 +FREQUENCY=12.50 diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c new file mode 100644 index 000000000..5ee520579 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c @@ -0,0 +1,30 @@ +/***********************************************************************/ +/* */ +/* FILE :dbsct.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Setting of B,R Section */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include "typedefine.h" + +#pragma section $DSEC +static const struct { + _UBYTE *rom_s; /* Start address of the initialized data section in ROM */ + _UBYTE *rom_e; /* End address of the initialized data section in ROM */ + _UBYTE *ram_s; /* Start address of the initialized data section in RAM */ +} DTBL[] = { + { __sectop("D"), __secend("D"), __sectop("R") } +}; +#pragma section $BSEC +static const struct { + _UBYTE *b_s; /* Start address of non-initialized data section */ + _UBYTE *b_e; /* End address of non-initialized data section */ +} BTBL[] = { + { __sectop("B"), __secend("B") } +}; diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c new file mode 100644 index 000000000..71a435a25 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c @@ -0,0 +1,22 @@ +/***********************************************************************/ +/* */ +/* FILE :intprg.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Interrupt Program */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include +#include "vect.h" +#pragma section IntPRG + +// 4 Illegal code +void INT_Illegal_code(void){/* sleep(); */} + +// Dummy +void Dummy(void){/* sleep(); */} diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c new file mode 100644 index 000000000..03891c5c2 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c @@ -0,0 +1,15 @@ + +void main(void); + +void main(void) +{ +volatile unsigned long ul; + + for( ;; ) + { + ul++; + ul++; + } +} + + diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c new file mode 100644 index 000000000..f3b5d3044 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c @@ -0,0 +1,106 @@ +/***********************************************************************/ +/* */ +/* FILE :resetprg.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Reset Program */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include +#include <_h_c_lib.h> +//#include // Remove the comment when you use errno +//#include // Remove the comment when you use rand() +#include "typedefine.h" +#include "stacksct.h" + +#define SR_Init 0x000000F0 +#ifdef _FPD // when -fpu=double is specified +#define FPSCR_Init 0x000C0001 +#else +#define FPSCR_Init 0x00040001 +#endif +#define INT_OFFSET 0x10 + +extern _UINT INT_Vectors; + +#ifdef __cplusplus +extern "C" { +#endif +void PowerON_Reset_PC(void); +void Manual_Reset_PC(void); +void main(void); +#ifdef __cplusplus +} +#endif + +//#ifdef __cplusplus // Enable I/O in the application(both SIM I/O and hardware I/O) +//extern "C" { +//#endif +//extern void _INIT_IOLIB(void); +//extern void _CLOSEALL(void); +//#ifdef __cplusplus +//} +//#endif + +//extern void srand(_UINT); // Remove the comment when you use rand() +//extern _SBYTE *_s1ptr; // Remove the comment when you use strtok() + +//#ifdef __cplusplus // Use Hardware Setup +//extern "C" { +//#endif +//extern void HardwareSetup(void); +//#ifdef __cplusplus +//} +//#endif + +//#ifdef __cplusplus // Remove the comment when you use global class object +//extern "C" { // Sections C$INIT and C$END will be generated +//#endif +//extern void _CALL_INIT(void); +//extern void _CALL_END(void); +//#ifdef __cplusplus +//} +//#endif + +#pragma section ResetPRG + +#pragma entry PowerON_Reset_PC + +void PowerON_Reset_PC(void) +{ + set_vbr((void *)((_UBYTE *)&INT_Vectors - INT_OFFSET)); + + set_fpscr(FPSCR_Init); + + _INITSCT(); + +// _CALL_INIT(); // Remove the comment when you use global class object + +// _INIT_IOLIB(); // Enable I/O in the application(both SIM I/O and hardware I/O) + +// errno=0; // Remove the comment when you use errno +// srand((_UINT)1); // Remove the comment when you use rand() +// _s1ptr=NULL; // Remove the comment when you use strtok() + +// HardwareSetup(); // Use Hardware Setup + + set_cr(SR_Init); + + main(); + +// _CLOSEALL(); // Close I/O in the application(both SIM I/O andhardware I/O) + +// _CALL_END(); // Remove the comment when you use global class object + + sleep(); +} + +//#pragma entry Manual_Reset_PC // Remove the comment when you use Manual Reset +void Manual_Reset_PC(void) +{ +} diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h b/Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h new file mode 100644 index 000000000..fb2eddb1a --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h @@ -0,0 +1,11 @@ +/***********************************************************************/ +/* */ +/* FILE :stacksct.h */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Setting of Stack area */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ +#pragma stacksize 0x400 /* Do not modify this line. */ diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h b/Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h new file mode 100644 index 000000000..372d68078 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h @@ -0,0 +1,23 @@ +/***********************************************************************/ +/* */ +/* FILE :typedefine.h */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Aliases of Integer Type */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +typedef signed char _SBYTE; +typedef unsigned char _UBYTE; +typedef signed short _SWORD; +typedef unsigned short _UWORD; +typedef signed int _SINT; +typedef unsigned int _UINT; +typedef signed long _SDWORD; +typedef unsigned long _UDWORD; +typedef signed long long _SQWORD; +typedef unsigned long long _UQWORD; diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h new file mode 100644 index 000000000..4331b0884 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h @@ -0,0 +1,37 @@ +/***********************************************************************/ +/* */ +/* FILE :vect.h */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Definition of Vector */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + + + +//;<> +//;0 Power On Reset PC +extern void PowerON_Reset_PC(void); + +//;<> +// 1 Power On Reset SP + +//;<> +//;2 Manual Reset PC +extern void Manual_Reset_PC(void); + +//;<> +// 3 Manual Reset SP + + +// 4 Illegal code +#pragma interrupt INT_Illegal_code +extern void INT_Illegal_code(void); + +// Dummy +#pragma interrupt Dummy +extern void Dummy(void); diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c new file mode 100644 index 000000000..338244307 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c @@ -0,0 +1,39 @@ +/***********************************************************************/ +/* */ +/* FILE :vecttbl.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Initialize of Vector Table */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include "vect.h" + +#pragma section VECTTBL + +void *RESET_Vectors[] = { +//;<> +//;0 Power On Reset PC + (void*) PowerON_Reset_PC, +//;<> +// 1 Power On Reset SP + __secend("S"), +//;<> +//;2 Manual Reset PC + (void*) Manual_Reset_PC, +//;<> +// 3 Manual Reset SP + __secend("S") + +}; +#pragma section INTTBL +void *INT_Vectors[] = { +// 4 Illegal code + (void*) INT_Illegal_code, +// xx Reserved + (void*) Dummy +}; -- 2.39.5