From bf7aecce04f0b29126b870c6d1e926bd26a681e8 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Mon, 3 Jul 2017 18:37:11 +0800 Subject: [PATCH] armv8/fsl-lsch2: correct the config description of DSPI clock divider It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by: Hou Zhiqiang Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5825f9b726..43b869f1fc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -307,7 +307,7 @@ config SYS_FSL_DSPI_CLK_DIV default 2 help This is the divider that is used to derive DSPI clock from Platform - PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider. + clock, in another word DSPI_clk = Platform_clk / this_divider. config SYS_FSL_DUART_CLK_DIV int "DUART clock divider" -- 2.39.5