From bfa89d2ba8f0a278df6de584dcfbd33814753e33 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 27 Jul 2015 22:34:54 +0200 Subject: [PATCH] arm: socfpga: Fix FPGA bitstream programming routine In case the FPGA bitstream is aligned to 4 bytes, skip the part of the assembler which handles unaligned bitstream. Otherwise, that part will loop indefinitelly. Signed-off-by: Marek Vasut Cc: Dinh Nguyen --- drivers/fpga/socfpga.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 63b3566e3e..4448250f5c 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -160,10 +160,13 @@ static void fpgamgr_program_write(const void *rbf_data, unsigned long rbf_size) " sub %1, #32\n" " subs %2, #1\n" " bne 1b\n" + " cmp %3, #0\n" + " beq 3f\n" "2: ldr %2, [%0], #4\n" " str %2, [%1]\n" " subs %3, #1\n" " bne 2b\n" + "3: nop\n" : "+r"(src), "+r"(dst), "+r"(loops32), "+r"(loops4) : : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "cc"); } -- 2.39.5