From c8c35155082d11deb7a2f9ccb99b11216cbd9d55 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Fri, 28 Oct 2016 10:13:57 -0700 Subject: [PATCH] imx: mx6: ddr: add register MPZQLP2CTL for LPDDR2 Add constants for the MPZQLP2CTL DDR register for both banks to allow setting the LPDDR2 timing values in .cfg files using a named constant instead of hex addresses as is currently done in mx6slevk and other board files. Signed-off-by: Eric Nelson --- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 99224091ba..53eb5fa9b0 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -495,6 +495,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, #define MX6_MMDC_P0_MPDGCTRL1 0x021b0840 #define MX6_MMDC_P0_MPRDDLCTL 0x021b0848 #define MX6_MMDC_P0_MPWRDLCTL 0x021b0850 +#define MX6_MMDC_P0_MPZQLP2CTL 0x021b085C #define MX6_MMDC_P0_MPMUR0 0x021b08b8 #define MX6_MMDC_P1_MDCTL 0x021b4000 @@ -522,6 +523,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, #define MX6_MMDC_P1_MPDGCTRL1 0x021b4840 #define MX6_MMDC_P1_MPRDDLCTL 0x021b4848 #define MX6_MMDC_P1_MPWRDLCTL 0x021b4850 +#define MX6_MMDC_P1_MPZQLP2CTL 0x021b485C #define MX6_MMDC_P1_MPMUR0 0x021b48b8 #endif /*__ASM_ARCH_MX6_DDR_H__ */ -- 2.39.2