From cf6eca7ccd9025e9f34f179682516f1e5d7e0e78 Mon Sep 17 00:00:00 2001 From: Lawrence Yu Date: Fri, 4 Mar 2016 09:08:56 -0800 Subject: [PATCH] sunxi: Configure only LVDS pins instead of all LCD pins when LVDS interface selected The behavior before this patch would attempt to configure the mux setting for pins 0 to 27 on PORTD to all be setting 3 for LVDS. The LVDS interface actually only uses pins 18 to 27 and not pins 0 to 27 as in the parallel LCD interface. This patch restricts the configuration to only the relevant pins 18 to 27 on PORTD. This was tested on a sun8i A33 tablet with an LVDS screen. MMC1 has the capability to use pins 2 to 7 on PORTD and the mux on those pins was being inadvertently set to setting 3 for MMC functionality which this patch corrects. Signed-off-by: Lawrence Yu [hdegoede@redhat.com: Only apply this change to A23 / A33] Signed-off-by: Hans de Goede --- drivers/video/sunxi_display.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index 9fee66a2a4..56f6c8e349 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -767,7 +767,11 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode, (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; int bp, clk_delay, clk_div, clk_double, pin, total, val; +#if defined CONFIG_MACH_SUN8I && defined CONFIG_VIDEO_LCD_IF_LVDS + for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) { +#else for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++) { +#endif #ifdef CONFIG_VIDEO_LCD_IF_PARALLEL sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0); #endif -- 2.39.5