From ddeb17161706e8233a12b01916159a78c3fadc0b Mon Sep 17 00:00:00 2001 From: uz Date: Sat, 29 Aug 2009 20:04:18 +0000 Subject: [PATCH] Info for long shift functions was missing or wrong. git-svn-id: svn://svn.cc65.org/cc65/trunk@4075 b7a2c559-68d2-44c3-8de9-860c34a00d81 --- src/cc65/codeinfo.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/src/cc65/codeinfo.c b/src/cc65/codeinfo.c index ec2661a32..c88451d59 100644 --- a/src/cc65/codeinfo.c +++ b/src/cc65/codeinfo.c @@ -76,7 +76,7 @@ struct FuncInfo { /* Note for the shift functions: Shifts are done modulo 32, so all shift * routines are marked to use only the A register. The remainder is ignored * anyway. - */ + */ static const FuncInfo FuncInfoTable[] = { { "addeq0sp", REG_AX, REG_AXY }, { "addeqysp", REG_AXY, REG_AXY }, @@ -85,10 +85,18 @@ static const FuncInfo FuncInfoTable[] = { { "aslax2", REG_AX, REG_AX | REG_TMP1 }, { "aslax3", REG_AX, REG_AX | REG_TMP1 }, { "aslax4", REG_AX, REG_AX | REG_TMP1 }, + { "asleax1", REG_EAX, REG_EAX | REG_TMP1 }, + { "asleax2", REG_EAX, REG_EAX | REG_TMP1 }, + { "asleax3", REG_EAX, REG_EAX | REG_TMP1 }, + { "asleax4", REG_EAX, REG_EAX | REG_TMP1 }, { "asrax1", REG_AX, REG_AX | REG_TMP1 }, { "asrax2", REG_AX, REG_AX | REG_TMP1 }, { "asrax3", REG_AX, REG_AX | REG_TMP1 }, { "asrax4", REG_AX, REG_AX | REG_TMP1 }, + { "asreax1", REG_EAX, REG_EAX | REG_TMP1 }, + { "asreax2", REG_EAX, REG_EAX | REG_TMP1 }, + { "asreax3", REG_EAX, REG_EAX | REG_TMP1 }, + { "asreax4", REG_EAX, REG_EAX | REG_TMP1 }, { "bnega", REG_A, REG_AX }, { "bnegax", REG_AX, REG_AX }, { "bnegeax", REG_EAX, REG_EAX }, @@ -199,14 +207,18 @@ static const FuncInfo FuncInfoTable[] = { { "shlax2", REG_AX, REG_AX | REG_TMP1 }, { "shlax3", REG_AX, REG_AX | REG_TMP1 }, { "shlax4", REG_AX, REG_AX | REG_TMP1 }, + { "shleax1", REG_EAX, REG_EAX | REG_TMP1 }, + { "shleax2", REG_EAX, REG_EAX | REG_TMP1 }, + { "shleax3", REG_EAX, REG_EAX | REG_TMP1 }, + { "shleax4", REG_EAX, REG_EAX | REG_TMP1 }, { "shrax1", REG_AX, REG_AX | REG_TMP1 }, { "shrax2", REG_AX, REG_AX | REG_TMP1 }, { "shrax3", REG_AX, REG_AX | REG_TMP1 }, { "shrax4", REG_AX, REG_AX | REG_TMP1 }, - { "shreax1", REG_EAX, REG_AX | REG_TMP1 }, - { "shreax2", REG_EAX, REG_AX | REG_TMP1 }, - { "shreax3", REG_EAX, REG_AX | REG_TMP1 }, - { "shreax4", REG_EAX, REG_AX | REG_TMP1 }, + { "shreax1", REG_EAX, REG_EAX | REG_TMP1 }, + { "shreax2", REG_EAX, REG_EAX | REG_TMP1 }, + { "shreax3", REG_EAX, REG_EAX | REG_TMP1 }, + { "shreax4", REG_EAX, REG_EAX | REG_TMP1 }, { "staspidx", REG_A | REG_Y, REG_Y | REG_TMP1 | REG_PTR1 }, { "stax0sp", REG_AX, REG_Y }, { "staxspidx", REG_AXY, REG_TMP1 | REG_PTR1 }, -- 2.39.5