From de095474788d6731f71bf4ce2187d047e0e8ee9b Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Sat, 5 Mar 2016 17:32:28 +0530 Subject: [PATCH] ARM: DRA7: emif: Fix updating of refresh ctrl shadow On DRA7, refresh ctrl shadow should be updated with the final value. Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini --- arch/arm/cpu/armv7/omap-common/emif-common.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index bf7bf262c7..90c241a007 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -163,7 +163,11 @@ void emif_update_timings(u32 base, const struct emif_regs *regs) { struct emif_reg_struct *emif = (struct emif_reg_struct *)base; - writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl_shdw); + if (!is_dra7xx()) + writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl_shdw); + else + writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl_shdw); + writel(regs->sdram_tim1, &emif->emif_sdram_tim_1_shdw); writel(regs->sdram_tim2, &emif->emif_sdram_tim_2_shdw); writel(regs->sdram_tim3, &emif->emif_sdram_tim_3_shdw); -- 2.39.5