From e1ae357d4b6b46eae462dacf837bc6dbf997cf90 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Sat, 27 Aug 2016 17:19:16 +0530 Subject: [PATCH] board: k2g: Enable ECC byte lane Enable ECC byte lane for k2g-evm Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini --- arch/arm/mach-keystone/ddr3.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c index 34606f4b2f..6b92530e42 100644 --- a/arch/arm/mach-keystone/ddr3.c +++ b/arch/arm/mach-keystone/ddr3.c @@ -65,9 +65,8 @@ void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1) ; - /* Disable ECC for K2G */ if (cpu_is_k2g()) { - clrbits_le32(base + KS2_DDRPHY_DATX8_4_OFFSET, 0x1); + setbits_le32(base + KS2_DDRPHY_DATX8_4_OFFSET, 0x1); clrbits_le32(base + KS2_DDRPHY_DATX8_5_OFFSET, 0x1); clrbits_le32(base + KS2_DDRPHY_DATX8_6_OFFSET, 0x1); clrbits_le32(base + KS2_DDRPHY_DATX8_7_OFFSET, 0x1); -- 2.39.5