From e393e2e9bc5cd3d5484e193d1380e7cd7587ab5c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 14 Aug 2009 16:43:22 -0500 Subject: [PATCH] 85xx: Fix addrmap to include memory When we init the addrmap based on the TLB we will not end up getting the TLB that covers memory if we are using SPD. The reason is we haven't relocated at the point that we setup the memory TLB and thus it will not get setup in the addrmap. Instead we can just walk over the TLB array after we've relocated and see all the TLBs that have been set and use that information to populate the initial addrmap. By doing this we insure that we get the TLB entries that cover memory. Signed-off-by: Kumar Gala --- cpu/mpc85xx/tlb.c | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 46925f1380..43ef1ffe6d 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -110,15 +110,31 @@ void init_tlbs(void) void init_addr_map(void) { int i; + unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff; - for (i = 0; i < num_tlb_entries; i++) { - if (tlb_table[i].tlb == 0) + /* walk all the entries */ + for (i = 0; i < max_cam; i++) { + unsigned long epn; + u32 tsize, _mas1; + phys_addr_t rpn; + + mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0)); + + asm volatile("tlbre;isync"); + _mas1 = mfspr(MAS1); + + /* if the entry isn't valid skip it */ + if (!(_mas1 & MAS1_VALID)) continue; - addrmap_set_entry(tlb_table[i].epn, - tlb_table[i].rpn, - (1UL << ((tlb_table[i].tsize * 2) + 10)), - tlb_table[i].esel); + tsize = (_mas1 >> 8) & 0xf; + epn = mfspr(MAS2) & MAS2_EPN; + rpn = mfspr(MAS3) & MAS3_RPN; +#ifdef CONFIG_ENABLE_36BIT_PHYS + rpn |= ((phys_addr_t)mfspr(MAS7)) << 32; +#endif + + addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), i); } return ; -- 2.39.5