From f28d5ee71fcbcd296d85e236013e16790732c3af Mon Sep 17 00:00:00 2001 From: Matthias Welwarsky Date: Fri, 16 Sep 2016 11:06:42 +0200 Subject: [PATCH] aarch64: fix error recovery in aarch64_dpm_prepare Flush DTRRX with a dummy read if it's full, clear sticky errors by writing CSE bit to EDRCR register. Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84 Signed-off-by: Matthias Welwarsky --- src/target/aarch64.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 4097d116..fcf600d1 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -360,10 +360,14 @@ static int aarch64_dpm_prepare(struct arm_dpm *dpm) if (dscr & DSCR_DTR_RX_FULL) { LOG_ERROR("DSCR_DTR_RX_FULL, dscr 0x%08" PRIx32, dscr); /* Clear DCCRX */ - retval = aarch64_exec_opcode( - a8->armv8_common.arm.target, - 0xd5130400, - &dscr); + retval = mem_ap_read_u32(a8->armv8_common.debug_ap, + a8->armv8_common.debug_base + CPUV8_DBG_DTRRX, &dscr); + if (retval != ERROR_OK) + return retval; + + /* Clear sticky error */ + retval = mem_ap_write_u32(a8->armv8_common.debug_ap, + a8->armv8_common.debug_base + CPUV8_DBG_DRCR, DRCR_CSE); if (retval != ERROR_OK) return retval; } -- 2.39.5