From f2a8279e7647411cfdd694daec7903d60da5a36f Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 4 Mar 2016 10:36:39 -0600 Subject: [PATCH] ARM: keystone2: K2G: power-off DSP during boot The DSPs are powered on by default upon a Power ON reset, and they are powered off on current Keystone 2 SoCs - K2HK, K2L, K2E during the boot in u-boot. This is not functional on K2G though. Extend the existing DSP power-off support to the only DSP present on K2G. Do note that the PSC clock domain module id for DSP on K2G differs from that of previous Keystone2 SoCs. Signed-off-by: Suman Anna Signed-off-by: Nishanth Menon Reviewed-by: Tom Rini --- arch/arm/mach-keystone/include/mach/hardware-k2g.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h b/arch/arm/mach-keystone/include/mach/hardware-k2g.h index fa4162fe99..ca2a119d39 100644 --- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h +++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h @@ -10,7 +10,7 @@ #ifndef __ASM_ARCH_HARDWARE_K2G_H #define __ASM_ARCH_HARDWARE_K2G_H -#define KS2_NUM_DSPS 0 +#define KS2_NUM_DSPS 1 /* Power and Sleep Controller (PSC) Domains */ #define KS2_LPSC_ALWAYSON 0 @@ -30,7 +30,10 @@ #define KS2_LPSC_MCASP 15 #define KS2_LPSC_SR 16 #define KS2_LPSC_MSMC 17 -#define KS2_LPSC_GEM 18 +#ifdef KS2_LPSC_GEM_0 +#undef KS2_LPSC_GEM_0 +#endif +#define KS2_LPSC_GEM_0 18 #define KS2_LPSC_ARM 19 #define KS2_LPSC_ASRC 20 #define KS2_LPSC_ICSS 21 -- 2.39.5