From fd5577ce26e18932bb5d4db02591625e46f2e9cc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 11 Jan 2018 16:28:31 +0100 Subject: [PATCH] clk: rmobile: Assure SD-IF clock are configured correctly The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate() implementation in the clock driver does not set the SD-IF divider. Fix it. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/clk/renesas/clk-rcar-gen3.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index 0c394a8a71..1be3fe7136 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -288,6 +288,8 @@ static ulong gen3_clk_get_rate(struct clk *clk) static ulong gen3_clk_set_rate(struct clk *clk, ulong rate) { + /* Force correct SD-IF divider configuration if applicable */ + gen3_clk_setup_sdif_div(clk); return gen3_clk_get_rate(clk); } -- 2.39.5