From fec61431a003f5778bafa2624073a571af8bec9f Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Wed, 18 Jun 2008 12:10:31 -0400 Subject: [PATCH] Remove duplicate definitions in include/lxt971a.h. Remove duplicate definitions in include/lxt971a.h. Remove duplicate registers and bits definitions in include/lxt971a.h for standard MII registers, and use values in include/miiphy.h instead. Signed-off-by: Hugo Villeneuve Signed-off-by: Ben Warren --- cpu/arm920t/at91rm9200/lxt972.c | 15 ++--- cpu/arm926ejs/davinci/lxt972.c | 15 ++--- drivers/net/ns7520_eth.c | 42 ++++++-------- drivers/net/ns9750_eth.c | 59 +++++++++---------- include/lxt971a.h | 100 -------------------------------- include/ns7520_eth.h | 1 + include/ns9750_eth.h | 1 + 7 files changed, 65 insertions(+), 168 deletions(-) diff --git a/cpu/arm920t/at91rm9200/lxt972.c b/cpu/arm920t/at91rm9200/lxt972.c index 4edcc9a1b9..260d393cf0 100644 --- a/cpu/arm920t/at91rm9200/lxt972.c +++ b/cpu/arm920t/at91rm9200/lxt972.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #ifdef CONFIG_DRIVER_ETHER @@ -51,8 +52,8 @@ unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac) unsigned short Id1, Id2; at91rm9200_EmacEnableMDIO (p_mac); - at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_ID1, &Id1); - at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_ID2, &Id2); + at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR1, &Id1); + at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR2, &Id2); at91rm9200_EmacDisableMDIO (p_mac); if ((Id1 == (0x0013)) && ((Id2 & 0xFFF0) == 0x78E0)) @@ -169,18 +170,18 @@ UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status) unsigned short value; /* Set lxt972 control register */ - if (!at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_CTRL, &value)) + if (!at91rm9200_EmacReadPhy (p_mac, PHY_BMCR, &value)) return FALSE; /* Restart Auto_negotiation */ - value |= PHY_COMMON_CTRL_RES_AUTO; - if (!at91rm9200_EmacWritePhy (p_mac, PHY_COMMON_CTRL, &value)) + value |= PHY_BMCR_RST_NEG; + if (!at91rm9200_EmacWritePhy (p_mac, PHY_BMCR, &value)) return FALSE; /*check AutoNegotiate complete */ udelay (10000); - at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_STAT, &value); - if (!(value & PHY_COMMON_STAT_AN_COMP)) + at91rm9200_EmacReadPhy(p_mac, PHY_BMSR, &value); + if (!(value & PHY_BMSR_AUTN_COMP)) return FALSE; return (lxt972_GetLinkSpeed (p_mac)); diff --git a/cpu/arm926ejs/davinci/lxt972.c b/cpu/arm926ejs/davinci/lxt972.c index 6eeb6e5ee9..620e7bbace 100644 --- a/cpu/arm926ejs/davinci/lxt972.c +++ b/cpu/arm926ejs/davinci/lxt972.c @@ -27,6 +27,7 @@ #include #include +#include #include #include @@ -38,9 +39,9 @@ int lxt972_is_phy_connected(int phy_addr) { u_int16_t id1, id2; - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_ID1, &id1)) + if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR1, &id1)) return(0); - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_ID2, &id2)) + if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR2, &id2)) return(0); if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0)) @@ -119,19 +120,19 @@ int lxt972_auto_negotiate(int phy_addr) u_int16_t tmp; - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_CTRL, &tmp)) + if (!dm644x_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) return(0); /* Restart Auto_negotiation */ - tmp |= PHY_COMMON_CTRL_RES_AUTO; - dm644x_eth_phy_write(phy_addr, PHY_COMMON_CTRL, tmp); + tmp |= PHY_BMCR_RST_NEG; + dm644x_eth_phy_write(phy_addr, PHY_BMCR, tmp); /*check AutoNegotiate complete */ udelay (10000); - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_STAT, &tmp)) + if (!dm644x_eth_phy_read(phy_addr, PHY_BMSR, &tmp)) return(0); - if (!(tmp & PHY_COMMON_STAT_AN_COMP)) + if (!(tmp & PHY_BMSR_AUTN_COMP)) return(0); return (lxt972_get_link_speed(phy_addr)); diff --git a/drivers/net/ns7520_eth.c b/drivers/net/ns7520_eth.c index 37411dfeb1..e19c223255 100644 --- a/drivers/net/ns7520_eth.c +++ b/drivers/net/ns7520_eth.c @@ -387,8 +387,8 @@ static int ns7520_eth_reset(void) ns7520_mii_get_clock_divisor(nPhyMaxMdioClock); /* reset PHY */ - ns7520_mii_write(PHY_COMMON_CTRL, PHY_COMMON_CTRL_RESET); - ns7520_mii_write(PHY_COMMON_CTRL, 0); + ns7520_mii_write(PHY_BMCR, PHY_BMCR_RESET); + ns7520_mii_write(PHY_BMCR, 0); udelay(3000); /* [2] p.70 says at least 300us reset recovery time. */ @@ -438,26 +438,23 @@ static void ns7520_link_auto_negotiate(void) /* run auto-negotation */ /* define what we are capable of */ - ns7520_mii_write(PHY_COMMON_AUTO_ADV, - PHY_COMMON_AUTO_ADV_100BTXFD | - PHY_COMMON_AUTO_ADV_100BTX | - PHY_COMMON_AUTO_ADV_10BTFD | - PHY_COMMON_AUTO_ADV_10BT | - PHY_COMMON_AUTO_ADV_802_3); + ns7520_mii_write(PHY_ANAR, + PHY_ANLPAR_TXFD | + PHY_ANLPAR_TX | + PHY_ANLPAR_10FD | + PHY_ANLPAR_10 | + PHY_ANLPAR_PSB_802_3); /* start auto-negotiation */ - ns7520_mii_write(PHY_COMMON_CTRL, - PHY_COMMON_CTRL_AUTO_NEG | - PHY_COMMON_CTRL_RES_AUTO); + ns7520_mii_write(PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); /* wait for completion */ ulStartJiffies = get_timer(0); while (get_timer(0) < ulStartJiffies + NS7520_MII_NEG_DELAY) { - uiStatus = ns7520_mii_read(PHY_COMMON_STAT); + uiStatus = ns7520_mii_read(PHY_BMSR); if ((uiStatus & - (PHY_COMMON_STAT_AN_COMP | PHY_COMMON_STAT_LNK_STAT)) - == - (PHY_COMMON_STAT_AN_COMP | PHY_COMMON_STAT_LNK_STAT)) { + (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)) == + (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)) { /* lucky we are, auto-negotiation succeeded */ ns7520_link_print_changed(); ns7520_link_update_egcr(); @@ -518,14 +515,13 @@ static void ns7520_link_print_changed(void) DEBUG_FN(DEBUG_LINK); - uiControl = ns7520_mii_read(PHY_COMMON_CTRL); + uiControl = ns7520_mii_read(PHY_BMCR); - if ((uiControl & PHY_COMMON_CTRL_AUTO_NEG) == - PHY_COMMON_CTRL_AUTO_NEG) { - /* PHY_COMMON_STAT_LNK_STAT is only set on autonegotiation */ - uiStatus = ns7520_mii_read(PHY_COMMON_STAT); + if ((uiControl & PHY_BMCR_AUTON) == PHY_BMCR_AUTON) { + /* PHY_BMSR_LS is only set on autonegotiation */ + uiStatus = ns7520_mii_read(PHY_BMSR); - if (!(uiStatus & PHY_COMMON_STAT_LNK_STAT)) { + if (!(uiStatus & PHY_BMSR_LS)) { printk(KERN_WARNING NS7520_DRIVER_NAME ": link down\n"); /* @TODO Linux: carrier_off */ @@ -586,12 +582,12 @@ static char ns7520_mii_identify_phy(void) DEBUG_FN(DEBUG_MII); - phyDetected = (PhyType) uiID1 = ns7520_mii_read(PHY_COMMON_ID1); + phyDetected = (PhyType) uiID1 = ns7520_mii_read(PHY_PHYIDR1); switch (phyDetected) { case PHY_LXT971A: szName = "LXT971A"; - uiID2 = ns7520_mii_read(PHY_COMMON_ID2); + uiID2 = ns7520_mii_read(PHY_PHYIDR2); nPhyMaxMdioClock = PHY_LXT971_MDIO_MAX_CLK; cRes = 1; break; diff --git a/drivers/net/ns9750_eth.c b/drivers/net/ns9750_eth.c index 0559710ccf..cade831ac9 100644 --- a/drivers/net/ns9750_eth.c +++ b/drivers/net/ns9750_eth.c @@ -37,7 +37,7 @@ #include "ns9750_eth.h" /* for Ethernet and PHY */ -/* some definition to make transistion to linux easier */ +/* some definition to make transition to linux easier */ #define NS9750_DRIVER_NAME "eth" #define KERN_WARNING "Warning:" @@ -399,8 +399,8 @@ static int ns9750_eth_reset (void) ns9750_mii_get_clock_divisor (nPhyMaxMdioClock); /* reset PHY */ - ns9750_mii_write (PHY_COMMON_CTRL, PHY_COMMON_CTRL_RESET); - ns9750_mii_write (PHY_COMMON_CTRL, 0); + ns9750_mii_write(PHY_BMCR, PHY_BMCR_RESET); + ns9750_mii_write(PHY_BMCR, 0); /* @TODO check time */ udelay (3000); /* [2] p.70 says at least 300us reset recovery time. But @@ -455,26 +455,26 @@ static void ns9750_link_force (void) DEBUG_FN (DEBUG_LINK); - uiControl = ns9750_mii_read (PHY_COMMON_CTRL); - uiControl &= ~(PHY_COMMON_CTRL_SPD_MA | - PHY_COMMON_CTRL_AUTO_NEG | PHY_COMMON_CTRL_DUPLEX); + uiControl = ns9750_mii_read(PHY_BMCR); + uiControl &= ~(PHY_BMCR_SPEED_MASK | + PHY_BMCR_AUTON | PHY_BMCR_DPLX); uiLastLinkStatus = 0; if ((ucLinkMode & FS_EEPROM_AUTONEG_SPEED_MASK) == FS_EEPROM_AUTONEG_SPEED_100) { - uiControl |= PHY_COMMON_CTRL_SPD_100; + uiControl |= PHY_BMCR_100MB; uiLastLinkStatus |= PHY_LXT971_STAT2_100BTX; } else - uiControl |= PHY_COMMON_CTRL_SPD_10; + uiControl |= PHY_BMCR_10_MBPS; if ((ucLinkMode & FS_EEPROM_AUTONEG_DUPLEX_MASK) == FS_EEPROM_AUTONEG_DUPLEX_FULL) { - uiControl |= PHY_COMMON_CTRL_DUPLEX; + uiControl |= PHY_BMCR_DPLX; uiLastLinkStatus |= PHY_LXT971_STAT2_DUPLEX_MODE; } - ns9750_mii_write (PHY_COMMON_CTRL, uiControl); + ns9750_mii_write(PHY_BMCR, uiControl); ns9750_link_print_changed (); ns9750_link_update_egcr (); @@ -495,25 +495,23 @@ static void ns9750_link_auto_negotiate (void) /* run auto-negotation */ /* define what we are capable of */ - ns9750_mii_write (PHY_COMMON_AUTO_ADV, - PHY_COMMON_AUTO_ADV_100BTXFD | - PHY_COMMON_AUTO_ADV_100BTX | - PHY_COMMON_AUTO_ADV_10BTFD | - PHY_COMMON_AUTO_ADV_10BT | - PHY_COMMON_AUTO_ADV_802_3); + ns9750_mii_write(PHY_ANAR, + PHY_ANLPAR_TXFD | + PHY_ANLPAR_TX | + PHY_ANLPAR_10FD | + PHY_ANLPAR_10 | + PHY_ANLPAR_PSB_802_3); /* start auto-negotiation */ - ns9750_mii_write (PHY_COMMON_CTRL, - PHY_COMMON_CTRL_AUTO_NEG | - PHY_COMMON_CTRL_RES_AUTO); + ns9750_mii_write(PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); /* wait for completion */ ulStartJiffies = get_ticks (); while (get_ticks () < ulStartJiffies + NS9750_MII_NEG_DELAY) { - uiStatus = ns9750_mii_read (PHY_COMMON_STAT); + uiStatus = ns9750_mii_read(PHY_BMSR); if ((uiStatus & - (PHY_COMMON_STAT_AN_COMP | PHY_COMMON_STAT_LNK_STAT)) == - (PHY_COMMON_STAT_AN_COMP | PHY_COMMON_STAT_LNK_STAT)) { + (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)) == + (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)) { /* lucky we are, auto-negotiation succeeded */ ns9750_link_print_changed (); ns9750_link_update_egcr (); @@ -571,14 +569,13 @@ static void ns9750_link_print_changed (void) DEBUG_FN (DEBUG_LINK); - uiControl = ns9750_mii_read (PHY_COMMON_CTRL); + uiControl = ns9750_mii_read(PHY_BMCR); - if ((uiControl & PHY_COMMON_CTRL_AUTO_NEG) == - PHY_COMMON_CTRL_AUTO_NEG) { - /* PHY_COMMON_STAT_LNK_STAT is only set on autonegotiation */ - uiStatus = ns9750_mii_read (PHY_COMMON_STAT); + if ((uiControl & PHY_BMCR_AUTON) == PHY_BMCR_AUTON) { + /* PHY_BMSR_LS is only set on autonegotiation */ + uiStatus = ns9750_mii_read(PHY_BMSR); - if (!(uiStatus & PHY_COMMON_STAT_LNK_STAT)) { + if (!(uiStatus & PHY_BMSR_LS)) { printk (KERN_WARNING NS9750_DRIVER_NAME ": link down\n"); /* @TODO Linux: carrier_off */ @@ -592,7 +589,7 @@ static void ns9750_link_print_changed (void) /* mask out all uninteresting parts */ } - /* other PHYs must store there link information in + /* other PHYs must store their link information in uiStatus as PHY_LXT971 */ } } else { @@ -637,12 +634,12 @@ static char ns9750_mii_identify_phy (void) DEBUG_FN (DEBUG_MII); - phyDetected = (PhyType) uiID1 = ns9750_mii_read (PHY_COMMON_ID1); + phyDetected = (PhyType) uiID1 = ns9750_mii_read(PHY_PHYIDR1); switch (phyDetected) { case PHY_LXT971A: szName = "LXT971A"; - uiID2 = ns9750_mii_read (PHY_COMMON_ID2); + uiID2 = ns9750_mii_read(PHY_PHYIDR2); nPhyMaxMdioClock = PHY_LXT971_MDIO_MAX_CLK; cRes = 1; break; diff --git a/include/lxt971a.h b/include/lxt971a.h index f76c336879..72145e0aa3 100644 --- a/include/lxt971a.h +++ b/include/lxt971a.h @@ -30,15 +30,6 @@ #define __LXT971A_H__ /* PHY definitions (LXT971A) [2] */ -#define PHY_COMMON_CTRL (0x00) -#define PHY_COMMON_STAT (0x01) -#define PHY_COMMON_ID1 (0x02) -#define PHY_COMMON_ID2 (0x03) -#define PHY_COMMON_AUTO_ADV (0x04) -#define PHY_COMMON_AUTO_LNKB (0x05) -#define PHY_COMMON_AUTO_EXP (0x06) -#define PHY_COMMON_AUTO_NEXT (0x07) -#define PHY_COMMON_AUTO_LNKN (0x08) #define PHY_LXT971_PORT_CFG (0x10) #define PHY_LXT971_STAT2 (0x11) #define PHY_LXT971_INT_ENABLE (0x12) @@ -47,97 +38,6 @@ #define PHY_LXT971_DIG_CFG (0x1A) #define PHY_LXT971_TX_CTRL (0x1E) -/* CTRL PHY Control Register Bit Fields */ -#define PHY_COMMON_CTRL_RESET (0x8000) -#define PHY_COMMON_CTRL_LOOPBACK (0x4000) -#define PHY_COMMON_CTRL_SPD_MA (0x2040) -#define PHY_COMMON_CTRL_SPD_10 (0x0000) -#define PHY_COMMON_CTRL_SPD_100 (0x2000) -#define PHY_COMMON_CTRL_SPD_1000 (0x0040) -#define PHY_COMMON_CTRL_SPD_RES (0x2040) -#define PHY_COMMON_CTRL_AUTO_NEG (0x1000) -#define PHY_COMMON_CTRL_POWER_DN (0x0800) -#define PHY_COMMON_CTRL_ISOLATE (0x0400) -#define PHY_COMMON_CTRL_RES_AUTO (0x0200) -#define PHY_COMMON_CTRL_DUPLEX (0x0100) -#define PHY_COMMON_CTRL_COL_TEST (0x0080) -#define PHY_COMMON_CTRL_RES1 (0x003F) - -/* STAT Status Register Bit Fields */ -#define PHY_COMMON_STAT_100BT4 (0x8000) -#define PHY_COMMON_STAT_100BXFD (0x4000) -#define PHY_COMMON_STAT_100BXHD (0x2000) -#define PHY_COMMON_STAT_10BTFD (0x1000) -#define PHY_COMMON_STAT_10BTHD (0x0800) -#define PHY_COMMON_STAT_100BT2FD (0x0400) -#define PHY_COMMON_STAT_100BT2HD (0x0200) -#define PHY_COMMON_STAT_EXT_STAT (0x0100) -#define PHY_COMMON_STAT_RES1 (0x0080) -#define PHY_COMMON_STAT_MF_PSUP (0x0040) -#define PHY_COMMON_STAT_AN_COMP (0x0020) -#define PHY_COMMON_STAT_RMT_FLT (0x0010) -#define PHY_COMMON_STAT_AN_CAP (0x0008) -#define PHY_COMMON_STAT_LNK_STAT (0x0004) -#define PHY_COMMON_STAT_JAB_DTCT (0x0002) -#define PHY_COMMON_STAT_EXT_CAP (0x0001) - -/* AUTO_ADV Auto-neg Advert Register Bit Fields */ -#define PHY_COMMON_AUTO_ADV_NP (0x8000) -#define PHY_COMMON_AUTO_ADV_RES1 (0x4000) -#define PHY_COMMON_AUTO_ADV_RMT_FLT (0x2000) -#define PHY_COMMON_AUTO_ADV_RES2 (0x1000) -#define PHY_COMMON_AUTO_ADV_AS_PAUSE (0x0800) -#define PHY_COMMON_AUTO_ADV_PAUSE (0x0400) -#define PHY_COMMON_AUTO_ADV_100BT4 (0x0200) -#define PHY_COMMON_AUTO_ADV_100BTXFD (0x0100) -#define PHY_COMMON_AUTO_ADV_100BTX (0x0080) -#define PHY_COMMON_AUTO_ADV_10BTFD (0x0040) -#define PHY_COMMON_AUTO_ADV_10BT (0x0020) -#define PHY_COMMON_AUTO_ADV_SEL_FLD_MA (0x001F) -#define PHY_COMMON_AUTO_ADV_802_9 (0x0002) -#define PHY_COMMON_AUTO_ADV_802_3 (0x0001) - -/* AUTO_LNKB Auto-neg Link Ability Register Bit Fields */ -#define PHY_COMMON_AUTO_LNKB_NP (0x8000) -#define PHY_COMMON_AUTO_LNKB_ACK (0x4000) -#define PHY_COMMON_AUTO_LNKB_RMT_FLT (0x2000) -#define PHY_COMMON_AUTO_LNKB_RES2 (0x1000) -#define PHY_COMMON_AUTO_LNKB_AS_PAUSE (0x0800) -#define PHY_COMMON_AUTO_LNKB_PAUSE (0x0400) -#define PHY_COMMON_AUTO_LNKB_100BT4 (0x0200) -#define PHY_COMMON_AUTO_LNKB_100BTXFD (0x0100) -#define PHY_COMMON_AUTO_LNKB_100BTX (0x0080) -#define PHY_COMMON_AUTO_LNKB_10BTFD (0x0040) -#define PHY_COMMON_AUTO_LNKB_10BT (0x0020) -#define PHY_COMMON_AUTO_LNKB_SEL_FLD_MA (0x001F) -#define PHY_COMMON_AUTO_LNKB_802_9 (0x0002) -#define PHY_COMMON_AUTO_LNKB_802_3 (0x0001) - -/* AUTO_EXP Auto-neg Expansion Register Bit Fields */ -#define PHY_COMMON_AUTO_EXP_RES1 (0xFFC0) -#define PHY_COMMON_AUTO_EXP_BASE_PAGE (0x0020) -#define PHY_COMMON_AUTO_EXP_PAR_DT_FLT (0x0010) -#define PHY_COMMON_AUTO_EXP_LNK_NP_CAP (0x0008) -#define PHY_COMMON_AUTO_EXP_NP_CAP (0x0004) -#define PHY_COMMON_AUTO_EXP_PAGE_REC (0x0002) -#define PHY_COMMON_AUTO_EXP_LNK_AN_CAP (0x0001) - -/* AUTO_NEXT Aut-neg Next Page Tx Register Bit Fields */ -#define PHY_COMMON_AUTO_NEXT_NP (0x8000) -#define PHY_COMMON_AUTO_NEXT_RES1 (0x4000) -#define PHY_COMMON_AUTO_NEXT_MSG_PAGE (0x2000) -#define PHY_COMMON_AUTO_NEXT_ACK_2 (0x1000) -#define PHY_COMMON_AUTO_NEXT_TOGGLE (0x0800) -#define PHY_COMMON_AUTO_NEXT_MSG (0x07FF) - -/* AUTO_LNKN Auto-neg Link Partner Rx Reg Bit Fields */ -#define PHY_COMMON_AUTO_LNKN_NP (0x8000) -#define PHY_COMMON_AUTO_LNKN_ACK (0x4000) -#define PHY_COMMON_AUTO_LNKN_MSG_PAGE (0x2000) -#define PHY_COMMON_AUTO_LNKN_ACK_2 (0x1000) -#define PHY_COMMON_AUTO_LNKN_TOGGLE (0x0800) -#define PHY_COMMON_AUTO_LNKN_MSG (0x07FF) - /* PORT_CFG Port Configuration Register Bit Fields */ #define PHY_LXT971_PORT_CFG_RES1 (0x8000) #define PHY_LXT971_PORT_CFG_FORCE_LNK (0x4000) diff --git a/include/ns7520_eth.h b/include/ns7520_eth.h index 123e6f4c2a..b509697c2f 100644 --- a/include/ns7520_eth.h +++ b/include/ns7520_eth.h @@ -24,6 +24,7 @@ #ifdef CONFIG_DRIVER_NS7520_ETHERNET +#include #include "lxt971a.h" /* The port addresses */ diff --git a/include/ns9750_eth.h b/include/ns9750_eth.h index a6e5889b7b..80c721b900 100644 --- a/include/ns9750_eth.h +++ b/include/ns9750_eth.h @@ -31,6 +31,7 @@ #ifdef CONFIG_DRIVER_NS9750_ETHERNET +#include #include "lxt971a.h" #define NS9750_ETH_MODULE_BASE (0xA0600000) -- 2.39.5