From ff9658d7049bf8c8e8e0a05dbe5e9f7e91aa5a5d Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Mon, 25 Jun 2007 10:41:04 +0800 Subject: [PATCH] mpc83xx: Fix the align bug of SDMA buffer According to the latest user manual, the SDMA temporary buffer base address must be 4KB aligned. Signed-off-by: Dave Liu Signed-off-by: Kim Phillips --- drivers/qe/qe.c | 2 +- drivers/qe/qe.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 5f209629f4..0f5232a72a 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -98,7 +98,7 @@ static void qe_sdma_init(void) out_be32(&p->sdaqmr, 0); /* Allocate 2KB temporary buffer for sdma */ - sdma_buffer_base = qe_muram_alloc(2048, 64); + sdma_buffer_base = qe_muram_alloc(2048, 4096); out_be32(&p->sdwbcr, sdma_buffer_base & QE_SDEBCR_BA_MASK); /* Clear sdma status */ diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index 0bcd0a9573..400b1a6f60 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -29,7 +29,7 @@ #define QE_NUM_OF_BRGS 16 #define UCC_MAX_NUM 8 -#define QE_DATAONLY_BASE (uint)(128) +#define QE_DATAONLY_BASE 0 #define QE_DATAONLY_SIZE (QE_MURAM_SIZE - QE_DATAONLY_BASE) /* QE threads SNUM -- 2.39.5