git.sur5r.net Git - armstart-ibdap/blob - inc/DAP.h

   1 /******************************************************************************\r
   2  * @file     DAP.h\r
   3  * @brief    CMSIS-DAP Definitions\r
   4  * @version  V1.00\r
   5  * @date     31. May 2012\r
   6  *\r
   7  * @note\r
   8  * Copyright (C) 2012 ARM Limited. All rights reserved.\r
   9  *\r
  10  * @par\r
  11  * ARM Limited (ARM) is supplying this software for use with Cortex-M\r
  12  * processor based microcontrollers.\r
  13  *\r
  14  * @par\r
  15  * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
  16  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
  17  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
  18  * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
  19  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
  20  *\r
  21  ******************************************************************************/\r
  22 \r
  23 #ifndef __DAP_H__\r
  24 #define __DAP_H__\r
  25 \r
  26 \r
  27 // DAP Command IDs\r
  28 #define ID_DAP_Info                     0x00\r
  29 #define ID_DAP_LED                      0x01\r
  30 #define ID_DAP_Connect                  0x02\r
  31 #define ID_DAP_Disconnect               0x03\r
  32 #define ID_DAP_TransferConfigure        0x04\r
  33 #define ID_DAP_Transfer                 0x05\r
  34 #define ID_DAP_TransferBlock            0x06\r
  35 #define ID_DAP_TransferAbort            0x07\r
  36 #define ID_DAP_WriteABORT               0x08\r
  37 #define ID_DAP_Delay                    0x09\r
  38 #define ID_DAP_ResetTarget              0x0A\r
  39 #define ID_DAP_SWJ_Pins                 0x10\r
  40 #define ID_DAP_SWJ_Clock                0x11\r
  41 #define ID_DAP_SWJ_Sequence             0x12\r
  42 #define ID_DAP_SWD_Configure            0x13\r
  43 #define ID_DAP_JTAG_Sequence            0x14\r
  44 #define ID_DAP_JTAG_Configure           0x15\r
  45 #define ID_DAP_JTAG_IDCODE              0x16\r
  46 \r
  47 // DAP Vendor Command IDs\r
  48 #define ID_DAP_Vendor0                  0x80\r
  49 #define ID_DAP_Vendor1                  0x81\r
  50 #define ID_DAP_Vendor2                  0x82\r
  51 #define ID_DAP_Vendor3                  0x83\r
  52 #define ID_DAP_Vendor4                  0x84\r
  53 #define ID_DAP_Vendor5                  0x85\r
  54 #define ID_DAP_Vendor6                  0x86\r
  55 #define ID_DAP_Vendor7                  0x87\r
  56 #define ID_DAP_Vendor8                  0x88\r
  57 #define ID_DAP_Vendor9                  0x89\r
  58 #define ID_DAP_Vendor10                 0x8A\r
  59 #define ID_DAP_Vendor11                 0x8B\r
  60 #define ID_DAP_Vendor12                 0x8C\r
  61 #define ID_DAP_Vendor13                 0x8D\r
  62 #define ID_DAP_Vendor14                 0x8E\r
  63 #define ID_DAP_Vendor15                 0x8F\r
  64 #define ID_DAP_Vendor16                 0x90\r
  65 #define ID_DAP_Vendor17                 0x91\r
  66 #define ID_DAP_Vendor18                 0x92\r
  67 #define ID_DAP_Vendor19                 0x93\r
  68 #define ID_DAP_Vendor20                 0x94\r
  69 #define ID_DAP_Vendor21                 0x95\r
  70 #define ID_DAP_Vendor22                 0x96\r
  71 #define ID_DAP_Vendor23                 0x97\r
  72 #define ID_DAP_Vendor24                 0x98\r
  73 #define ID_DAP_Vendor25                 0x99\r
  74 #define ID_DAP_Vendor26                 0x9A\r
  75 #define ID_DAP_Vendor27                 0x9B\r
  76 #define ID_DAP_Vendor28                 0x9C\r
  77 #define ID_DAP_Vendor29                 0x9D\r
  78 #define ID_DAP_Vendor30                 0x9E\r
  79 #define ID_DAP_Vendor31                 0x9F\r
  80 \r
  81 #define ID_DAP_Invalid                  0xFF\r
  82 \r
  83 // DAP Status Code\r
  84 #define DAP_OK                          0\r
  85 #define DAP_ERROR                       0xFF\r
  86 \r
  87 // DAP ID\r
  88 #define DAP_ID_VENDOR                   1\r
  89 #define DAP_ID_PRODUCT                  2\r
  90 #define DAP_ID_SER_NUM                  3\r
  91 #define DAP_ID_FW_VER                   4\r
  92 #define DAP_ID_DEVICE_VENDOR            5\r
  93 #define DAP_ID_DEVICE_NAME              6\r
  94 #define DAP_ID_CAPABILITIES             0xF0\r
  95 #define DAP_ID_PACKET_COUNT             0xFE\r
  96 #define DAP_ID_PACKET_SIZE              0xFF\r
  97 \r
  98 // DAP LEDs\r
  99 #define DAP_LED_DEBUGGER_CONNECTED      0\r
 100 #define DAP_LED_TARGET_RUNNING          1\r
 101 \r
 102 // DAP Port\r
 103 #define DAP_PORT_AUTODETECT             0       // Autodetect Port\r
 104 #define DAP_PORT_DISABLED               0       // Port Disabled (I/O pins in High-Z)\r
 105 #define DAP_PORT_SWD                    1       // SWD Port (SWCLK, SWDIO) + nRESET\r
 106 #define DAP_PORT_JTAG                   2       // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET\r
 107 \r
 108 // DAP SWJ Pins\r
 109 #define DAP_SWJ_SWCLK_TCK               0       // SWCLK/TCK\r
 110 #define DAP_SWJ_SWDIO_TMS               1       // SWDIO/TMS\r
 111 #define DAP_SWJ_TDI                     2       // TDI\r
 112 #define DAP_SWJ_TDO                     3       // TDO\r
 113 #define DAP_SWJ_nTRST                   5       // nTRST\r
 114 #define DAP_SWJ_nRESET                  7       // nRESET\r
 115 \r
 116 // DAP Transfer Request\r
 117 #define DAP_TRANSFER_APnDP              (1<<0)\r
 118 #define DAP_TRANSFER_RnW                (1<<1)\r
 119 #define DAP_TRANSFER_A2                 (1<<2)\r
 120 #define DAP_TRANSFER_A3                 (1<<3)\r
 121 #define DAP_TRANSFER_MATCH_VALUE        (1<<4)\r
 122 #define DAP_TRANSFER_MATCH_MASK         (1<<5)\r
 123 \r
 124 // DAP Transfer Response\r
 125 #define DAP_TRANSFER_OK                 (1<<0)\r
 126 #define DAP_TRANSFER_WAIT               (1<<1)\r
 127 #define DAP_TRANSFER_FAULT              (1<<2)\r
 128 #define DAP_TRANSFER_ERROR              (1<<3)\r
 129 #define DAP_TRANSFER_MISMATCH           (1<<4)\r
 130 \r
 131 \r
 132 // Debug Port Register Addresses\r
 133 #define DP_IDCODE                       0x00    // IDCODE Register (SW Read only)\r
 134 #define DP_ABORT                        0x00    // Abort Register (SW Write only)\r
 135 #define DP_CTRL_STAT                    0x04    // Control & Status\r
 136 #define DP_WCR                          0x04    // Wire Control Register (SW Only)\r
 137 #define DP_SELECT                       0x08    // Select Register (JTAG R/W & SW W)\r
 138 #define DP_RESEND                       0x08    // Resend (SW Read Only)\r
 139 #define DP_RDBUFF                       0x0C    // Read Buffer (Read Only)\r
 140 \r
 141 // JTAG IR Codes\r
 142 #define JTAG_ABORT                      0x08\r
 143 #define JTAG_DPACC                      0x0A\r
 144 #define JTAG_APACC                      0x0B\r
 145 #define JTAG_IDCODE                     0x0E\r
 146 #define JTAG_BYPASS                     0x0F\r
 147 \r
 148 // JTAG Sequence Info\r
 149 #define JTAG_SEQUENCE_TCK               0x3F    // TCK count\r
 150 #define JTAG_SEQUENCE_TMS               0x40    // TMS value\r
 151 #define JTAG_SEQUENCE_TDO               0x80    // TDO capture\r
 152 \r
 153 \r
 154 #include <stddef.h>\r
 155 #include <stdint.h>\r
 156 \r
 157 // DAP Data structure\r
 158 typedef struct {\r
 159   uint8_t     debug_port;                       // Debug Port\r
 160   uint8_t     fast_clock;                       // Fast Clock Flag\r
 161   uint32_t   clock_delay;                       // Clock Delay\r
 162   struct {                                      // Transfer Configuration\r
 163     uint8_t   idle_cycles;                      // Idle cycles after transfer\r
 164     uint16_t  retry_count;                      // Number of retries after WAIT response\r
 165     uint16_t  match_retry;                      // Number of retries if read value does not match\r
 166     uint32_t  match_mask;                       // Match Mask\r
 167   } transfer;\r
 168 #if (DAP_SWD != 0)\r
 169   struct {                                      // SWD Configuration\r
 170     uint8_t    turnaround;                      // Turnaround period\r
 171     uint8_t    data_phase;                      // Always generate Data Phase\r
 172   } swd_conf;\r
 173 #endif\r
 174 #if (DAP_JTAG != 0)\r
 175   struct {                                      // JTAG Device Chain\r
 176     uint8_t   count;                            // Number of devices\r
 177     uint8_t   index;                            // Device index (device at TDO has index 0)\r
 178 #if (DAP_JTAG_DEV_CNT != 0)\r
 179     uint8_t   ir_length[DAP_JTAG_DEV_CNT];      // IR Length in bits\r
 180     uint16_t  ir_before[DAP_JTAG_DEV_CNT];      // Bits before IR\r
 181     uint16_t  ir_after [DAP_JTAG_DEV_CNT];      // Bits after IR\r
 182 #endif\r
 183   } jtag_dev;\r
 184 #endif\r
 185 } DAP_Data_t;\r
 186 \r
 187 extern          DAP_Data_t DAP_Data;            // DAP Data\r
 188 extern volatile uint8_t    DAP_TransferAbort;   // Transfer Abort Flag\r
 189 \r
 190 \r
 191 // Functions\r
 192 extern void     SWJ_Sequence    (uint32_t count, uint8_t *data);\r
 193 extern void     JTAG_Sequence   (uint32_t info,  uint8_t *tdi, uint8_t *tdo);\r
 194 extern void     JTAG_IR         (uint32_t ir);\r
 195 extern uint32_t JTAG_ReadIDCode (void);\r
 196 extern void     JTAG_WriteAbort (uint32_t data);\r
 197 extern uint8_t  JTAG_Transfer   (uint32_t request, uint32_t *data);\r
 198 extern uint8_t  SWD_Transfer    (uint32_t request, uint32_t *data);\r
 199 \r
 200 extern void     Delayms         (uint32_t delay);\r
 201 \r
 202 extern uint32_t DAP_ProcessVendorCommand (uint8_t *request, uint8_t *response);\r
 203 \r
 204 extern uint32_t DAP_ProcessCommand (uint8_t *request, uint8_t *response);\r
 205 extern void     DAP_Setup (void);\r
 206 \r
 207 // Configurable delay for clock generation\r
 208 #ifndef DELAY_SLOW_CYCLES\r
 209 #define DELAY_SLOW_CYCLES       3       // Number of cycles for one iteration\r
 210 #endif\r
 211 static __forceinline void PIN_DELAY_SLOW (uint32_t delay) {\r
 212   int32_t count;\r
 213 \r
 214   count = delay;\r
 215   while (--count);\r
 216 }\r
 217 \r
 218 // Fixed delay for fast clock generation\r
 219 #ifndef DELAY_FAST_CYCLES\r
 220 #define DELAY_FAST_CYCLES       0       // Number of cycles: 0..3\r
 221 #endif\r
 222 static __forceinline void PIN_DELAY_FAST (void) {\r
 223 #if (DELAY_FAST_CYCLES >= 1)\r
 224   __nop();\r
 225 #endif\r
 226 #if (DELAY_FAST_CYCLES >= 2)\r
 227   __nop();\r
 228 #endif\r
 229 #if (DELAY_FAST_CYCLES >= 3)\r
 230   __nop();\r
 231 #endif\r
 232 }\r
 233 \r
 234 \r
 235 #endif  /* __DAP_H__ */\r