]> git.sur5r.net Git - armstart-ibdap/blobdiff - inc/DAP.h
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[armstart-ibdap] / inc / DAP.h
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+/******************************************************************************\r
+ * @file     DAP.h\r
+ * @brief    CMSIS-DAP Definitions\r
+ * @version  V1.00\r
+ * @date     31. May 2012\r
+ *\r
+ * @note\r
+ * Copyright (C) 2012 ARM Limited. All rights reserved.\r
+ *\r
+ * @par\r
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M\r
+ * processor based microcontrollers.\r
+ *\r
+ * @par\r
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED\r
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\r
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\r
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.\r
+ *\r
+ ******************************************************************************/\r
+\r
+#ifndef __DAP_H__\r
+#define __DAP_H__\r
+\r
+\r
+// DAP Command IDs\r
+#define ID_DAP_Info                     0x00\r
+#define ID_DAP_LED                      0x01\r
+#define ID_DAP_Connect                  0x02\r
+#define ID_DAP_Disconnect               0x03\r
+#define ID_DAP_TransferConfigure        0x04\r
+#define ID_DAP_Transfer                 0x05\r
+#define ID_DAP_TransferBlock            0x06\r
+#define ID_DAP_TransferAbort            0x07\r
+#define ID_DAP_WriteABORT               0x08\r
+#define ID_DAP_Delay                    0x09\r
+#define ID_DAP_ResetTarget              0x0A\r
+#define ID_DAP_SWJ_Pins                 0x10\r
+#define ID_DAP_SWJ_Clock                0x11\r
+#define ID_DAP_SWJ_Sequence             0x12\r
+#define ID_DAP_SWD_Configure            0x13\r
+#define ID_DAP_JTAG_Sequence            0x14\r
+#define ID_DAP_JTAG_Configure           0x15\r
+#define ID_DAP_JTAG_IDCODE              0x16\r
+\r
+// DAP Vendor Command IDs\r
+#define ID_DAP_Vendor0                  0x80\r
+#define ID_DAP_Vendor1                  0x81\r
+#define ID_DAP_Vendor2                  0x82\r
+#define ID_DAP_Vendor3                  0x83\r
+#define ID_DAP_Vendor4                  0x84\r
+#define ID_DAP_Vendor5                  0x85\r
+#define ID_DAP_Vendor6                  0x86\r
+#define ID_DAP_Vendor7                  0x87\r
+#define ID_DAP_Vendor8                  0x88\r
+#define ID_DAP_Vendor9                  0x89\r
+#define ID_DAP_Vendor10                 0x8A\r
+#define ID_DAP_Vendor11                 0x8B\r
+#define ID_DAP_Vendor12                 0x8C\r
+#define ID_DAP_Vendor13                 0x8D\r
+#define ID_DAP_Vendor14                 0x8E\r
+#define ID_DAP_Vendor15                 0x8F\r
+#define ID_DAP_Vendor16                 0x90\r
+#define ID_DAP_Vendor17                 0x91\r
+#define ID_DAP_Vendor18                 0x92\r
+#define ID_DAP_Vendor19                 0x93\r
+#define ID_DAP_Vendor20                 0x94\r
+#define ID_DAP_Vendor21                 0x95\r
+#define ID_DAP_Vendor22                 0x96\r
+#define ID_DAP_Vendor23                 0x97\r
+#define ID_DAP_Vendor24                 0x98\r
+#define ID_DAP_Vendor25                 0x99\r
+#define ID_DAP_Vendor26                 0x9A\r
+#define ID_DAP_Vendor27                 0x9B\r
+#define ID_DAP_Vendor28                 0x9C\r
+#define ID_DAP_Vendor29                 0x9D\r
+#define ID_DAP_Vendor30                 0x9E\r
+#define ID_DAP_Vendor31                 0x9F\r
+\r
+#define ID_DAP_Invalid                  0xFF\r
+\r
+// DAP Status Code\r
+#define DAP_OK                          0\r
+#define DAP_ERROR                       0xFF\r
+\r
+// DAP ID\r
+#define DAP_ID_VENDOR                   1\r
+#define DAP_ID_PRODUCT                  2\r
+#define DAP_ID_SER_NUM                  3\r
+#define DAP_ID_FW_VER                   4\r
+#define DAP_ID_DEVICE_VENDOR            5\r
+#define DAP_ID_DEVICE_NAME              6\r
+#define DAP_ID_CAPABILITIES             0xF0\r
+#define DAP_ID_PACKET_COUNT             0xFE\r
+#define DAP_ID_PACKET_SIZE              0xFF\r
+\r
+// DAP LEDs\r
+#define DAP_LED_DEBUGGER_CONNECTED      0\r
+#define DAP_LED_TARGET_RUNNING          1\r
+\r
+// DAP Port\r
+#define DAP_PORT_AUTODETECT             0       // Autodetect Port\r
+#define DAP_PORT_DISABLED               0       // Port Disabled (I/O pins in High-Z)\r
+#define DAP_PORT_SWD                    1       // SWD Port (SWCLK, SWDIO) + nRESET\r
+#define DAP_PORT_JTAG                   2       // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET\r
+\r
+// DAP SWJ Pins\r
+#define DAP_SWJ_SWCLK_TCK               0       // SWCLK/TCK\r
+#define DAP_SWJ_SWDIO_TMS               1       // SWDIO/TMS\r
+#define DAP_SWJ_TDI                     2       // TDI\r
+#define DAP_SWJ_TDO                     3       // TDO\r
+#define DAP_SWJ_nTRST                   5       // nTRST\r
+#define DAP_SWJ_nRESET                  7       // nRESET\r
+\r
+// DAP Transfer Request\r
+#define DAP_TRANSFER_APnDP              (1<<0)\r
+#define DAP_TRANSFER_RnW                (1<<1)\r
+#define DAP_TRANSFER_A2                 (1<<2)\r
+#define DAP_TRANSFER_A3                 (1<<3)\r
+#define DAP_TRANSFER_MATCH_VALUE        (1<<4)\r
+#define DAP_TRANSFER_MATCH_MASK         (1<<5)\r
+\r
+// DAP Transfer Response\r
+#define DAP_TRANSFER_OK                 (1<<0)\r
+#define DAP_TRANSFER_WAIT               (1<<1)\r
+#define DAP_TRANSFER_FAULT              (1<<2)\r
+#define DAP_TRANSFER_ERROR              (1<<3)\r
+#define DAP_TRANSFER_MISMATCH           (1<<4)\r
+\r
+\r
+// Debug Port Register Addresses\r
+#define DP_IDCODE                       0x00    // IDCODE Register (SW Read only)\r
+#define DP_ABORT                        0x00    // Abort Register (SW Write only)\r
+#define DP_CTRL_STAT                    0x04    // Control & Status\r
+#define DP_WCR                          0x04    // Wire Control Register (SW Only)\r
+#define DP_SELECT                       0x08    // Select Register (JTAG R/W & SW W)\r
+#define DP_RESEND                       0x08    // Resend (SW Read Only)\r
+#define DP_RDBUFF                       0x0C    // Read Buffer (Read Only)\r
+\r
+// JTAG IR Codes\r
+#define JTAG_ABORT                      0x08\r
+#define JTAG_DPACC                      0x0A\r
+#define JTAG_APACC                      0x0B\r
+#define JTAG_IDCODE                     0x0E\r
+#define JTAG_BYPASS                     0x0F\r
+\r
+// JTAG Sequence Info\r
+#define JTAG_SEQUENCE_TCK               0x3F    // TCK count\r
+#define JTAG_SEQUENCE_TMS               0x40    // TMS value\r
+#define JTAG_SEQUENCE_TDO               0x80    // TDO capture\r
+\r
+\r
+#include <stddef.h>\r
+#include <stdint.h>\r
+\r
+// DAP Data structure\r
+typedef struct {\r
+  uint8_t     debug_port;                       // Debug Port\r
+  uint8_t     fast_clock;                       // Fast Clock Flag\r
+  uint32_t   clock_delay;                       // Clock Delay\r
+  struct {                                      // Transfer Configuration\r
+    uint8_t   idle_cycles;                      // Idle cycles after transfer\r
+    uint16_t  retry_count;                      // Number of retries after WAIT response\r
+    uint16_t  match_retry;                      // Number of retries if read value does not match\r
+    uint32_t  match_mask;                       // Match Mask\r
+  } transfer;\r
+#if (DAP_SWD != 0)\r
+  struct {                                      // SWD Configuration\r
+    uint8_t    turnaround;                      // Turnaround period\r
+    uint8_t    data_phase;                      // Always generate Data Phase\r
+  } swd_conf;\r
+#endif\r
+#if (DAP_JTAG != 0)\r
+  struct {                                      // JTAG Device Chain\r
+    uint8_t   count;                            // Number of devices\r
+    uint8_t   index;                            // Device index (device at TDO has index 0)\r
+#if (DAP_JTAG_DEV_CNT != 0)\r
+    uint8_t   ir_length[DAP_JTAG_DEV_CNT];      // IR Length in bits\r
+    uint16_t  ir_before[DAP_JTAG_DEV_CNT];      // Bits before IR\r
+    uint16_t  ir_after [DAP_JTAG_DEV_CNT];      // Bits after IR\r
+#endif\r
+  } jtag_dev;\r
+#endif\r
+} DAP_Data_t;\r
+\r
+extern          DAP_Data_t DAP_Data;            // DAP Data\r
+extern volatile uint8_t    DAP_TransferAbort;   // Transfer Abort Flag\r
+\r
+\r
+// Functions\r
+extern void     SWJ_Sequence    (uint32_t count, uint8_t *data);\r
+extern void     JTAG_Sequence   (uint32_t info,  uint8_t *tdi, uint8_t *tdo);\r
+extern void     JTAG_IR         (uint32_t ir);\r
+extern uint32_t JTAG_ReadIDCode (void);\r
+extern void     JTAG_WriteAbort (uint32_t data);\r
+extern uint8_t  JTAG_Transfer   (uint32_t request, uint32_t *data);\r
+extern uint8_t  SWD_Transfer    (uint32_t request, uint32_t *data);\r
+\r
+extern void     Delayms         (uint32_t delay);\r
+\r
+extern uint32_t DAP_ProcessVendorCommand (uint8_t *request, uint8_t *response);\r
+\r
+extern uint32_t DAP_ProcessCommand (uint8_t *request, uint8_t *response);\r
+extern void     DAP_Setup (void);\r
+\r
+// Configurable delay for clock generation\r
+#ifndef DELAY_SLOW_CYCLES\r
+#define DELAY_SLOW_CYCLES       3       // Number of cycles for one iteration\r
+#endif\r
+static __forceinline void PIN_DELAY_SLOW (uint32_t delay) {\r
+  int32_t count;\r
+\r
+  count = delay;\r
+  while (--count);\r
+}\r
+\r
+// Fixed delay for fast clock generation\r
+#ifndef DELAY_FAST_CYCLES\r
+#define DELAY_FAST_CYCLES       0       // Number of cycles: 0..3\r
+#endif\r
+static __forceinline void PIN_DELAY_FAST (void) {\r
+#if (DELAY_FAST_CYCLES >= 1)\r
+  __nop();\r
+#endif\r
+#if (DELAY_FAST_CYCLES >= 2)\r
+  __nop();\r
+#endif\r
+#if (DELAY_FAST_CYCLES >= 3)\r
+  __nop();\r
+#endif\r
+}\r
+\r
+\r
+#endif  /* __DAP_H__ */\r