From: Stefan <stefan.haubenthal@gmail.com>
Date: Mon, 20 Aug 2018 21:56:16 +0000 (+0000)
Subject: CMOS optimisation 3rd
X-Git-Url: https://git.sur5r.net/?p=cc65;a=commitdiff_plain;h=3ae5161636cc248e6ccc8eeb81e189f50c8b26f7

CMOS optimisation 3rd

"The decimal flag D is cleared" [...]
http://shu.emuunlim.com/download/pcedocs/pce_cpu.html
---

diff --git a/libsrc/pce/crt0.s b/libsrc/pce/crt0.s
index 75ffb7f05..c9a8e8c8f 100644
--- a/libsrc/pce/crt0.s
+++ b/libsrc/pce/crt0.s
@@ -39,7 +39,6 @@ start:
         nop
         csh                     ; Set high speed CPU mode
         nop
-        cld
         nop
 
         ; Set up stack and memory mapping