\r
/******************************************************************************\r
*\r
-* The minimal vector table for a Cortex M3. Note that the proper constructs\r
+* The minimal vector table for a Cortex-M3. Note that the proper constructs\r
* must be placed on this to ensure that it ends up at physical address\r
* 0x0000.0000.\r
*\r
MemManageException,\r
BusFaultException,\r
UsageFaultException,\r
- 0, 0, 0, 0, /* Reserved */ \r
+ (void*)0, (void*)0, (void*)0, (void*)0, /* Reserved */ \r
vPortSVCHandler,\r
DebugMonitor,\r
- 0, /* Reserved */\r
+ (void*)0, /* Reserved */\r
xPortPendSVHandler,\r
xPortSysTickHandler,\r
WWDG_IRQHandler,\r
EXTI15_10_IRQHandler,\r
RTCAlarm_IRQHandler,\r
USBWakeUp_IRQHandler,\r
- 0,\r
- 0,\r
- 0,\r
- 0,\r
- 0,\r
- 0,\r
- 0,\r
- (unsigned long)0xF108F85F //this is a workaround for boot in RAM mode.\r
+ (void*)0,\r
+ (void*)0,\r
+ (void*)0,\r
+ (void*)0,\r
+ (void*)0,\r
+ (void*)0,\r
+ (void*)0,\r
+ (void*)0xF108F85F //this is a workaround for boot in RAM mode.\r
};\r
\r
/*******************************************************************************\r