-/**\r
- * @brief Sends an Ethernet frame.\r
- * @param heth: pointer to a ETH_HandleTypeDef structure that contains\r
- * the configuration information for ETHERNET module\r
- * @param FrameLength: Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength)\r
-{\r
- uint32_t bufcount = 0, size = 0, i = 0;\r
- __IO ETH_DMADescTypeDef *pxDmaTxDesc = heth->TxDesc;\r
- /* Process Locked */\r
- __HAL_LOCK( heth );\r
-\r
- /* Set the ETH peripheral state to BUSY */\r
- heth->State = HAL_ETH_STATE_BUSY;\r
-\r
- if( FrameLength == 0 )\r
- {\r
- /* Set ETH HAL state to READY */\r
- heth->State = HAL_ETH_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK( heth );\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */\r
- if( ( pxDmaTxDesc->Status & ETH_DMATXDESC_OWN ) != ( uint32_t ) RESET )\r
- {\r
- /* OWN bit set */\r
- heth->State = HAL_ETH_STATE_BUSY_TX;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK( heth );\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Get the number of needed Tx buffers for the current frame, rounding up. */\r
- bufcount = ( FrameLength + ETH_TX_BUF_SIZE - 1 ) / ETH_TX_BUF_SIZE;\r
-\r
- if (bufcount == 1)\r
- {\r
- /* Set LAST and FIRST segment */\r
- pxDmaTxDesc->Status |= ETH_DMATXDESC_FS | ETH_DMATXDESC_LS;\r
- /* Set frame size */\r
- pxDmaTxDesc->ControlBufferSize = ( FrameLength & ETH_DMATXDESC_TBS1 );\r
- /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */\r
- pxDmaTxDesc->Status |= ETH_DMATXDESC_OWN;\r
- /* Point to next descriptor */\r
- heth->TxDesc = ( ETH_DMADescTypeDef * ) ( heth->TxDesc->Buffer2NextDescAddr );\r
- }\r
- else\r
- {\r
- for( i = 0; i < bufcount; i++ )\r
- {\r
- /* Clear FIRST and LAST segment bits */\r
- uint32_t ulStatus = heth->TxDesc->Status & ~( ETH_DMATXDESC_FS | ETH_DMATXDESC_LS );\r
-\r
- if( i == 0 )\r
- {\r
- /* Setting the first segment bit */\r
- heth->TxDesc->Status = ulStatus | ETH_DMATXDESC_FS;\r
- }\r
-\r
- /* Program size */\r
- if (i < (bufcount-1))\r
- {\r
- heth->TxDesc->ControlBufferSize = (ETH_TX_BUF_SIZE & ETH_DMATXDESC_TBS1);\r
- }\r
- else\r
- {\r
- /* Setting the last segment bit */\r
- heth->TxDesc->Status = ulStatus | ETH_DMATXDESC_LS;\r
- size = FrameLength - (bufcount-1)*ETH_TX_BUF_SIZE;\r
- heth->TxDesc->ControlBufferSize = (size & ETH_DMATXDESC_TBS1);\r
- }\r
-\r
- /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */\r
- heth->TxDesc->Status |= ETH_DMATXDESC_OWN;\r
- /* point to next descriptor */\r
- heth->TxDesc = (ETH_DMADescTypeDef *)( heth->TxDesc->Buffer2NextDescAddr );\r
- }\r
- }\r
-\r
- __DSB();\r
-\r
- /* When Tx Buffer unavailable flag is set: clear it and resume transmission */\r
- if( ( heth->Instance->DMASR & ETH_DMASR_TBUS ) != ( uint32_t )RESET )\r
- {\r
- heth->Instance->DMACHTDR = ( uint32_t )pxDmaTxDesc;\r
-\r
- /* Clear TBUS ETHERNET DMA flag */\r
- heth->Instance->DMASR = ETH_DMASR_TBUS;\r
- /* Resume DMA transmission*/\r
- heth->Instance->DMATPDR = 0;\r
- }\r
-\r
- /* Set ETH HAL State to Ready */\r
- heth->State = HAL_ETH_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK( heth );\r
-\r
- /* Return function status */\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Checks for received frames.\r
- * @param heth: pointer to a ETH_HandleTypeDef structure that contains\r
- * the configuration information for ETHERNET module\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT( ETH_HandleTypeDef *heth )\r
-{\r
- return HAL_ETH_GetReceivedFrame( heth );\r
-}\r
-\r
-HAL_StatusTypeDef HAL_ETH_GetReceivedFrame( ETH_HandleTypeDef *heth )\r
-{\r
-uint32_t ulCounter = 0;\r
-ETH_DMADescTypeDef *pxDescriptor = heth->RxDesc;\r
-HAL_StatusTypeDef xResult = HAL_ERROR;\r
-\r
- /* Process Locked */\r
- __HAL_LOCK( heth );\r
-\r
- /* Check the ETH state to BUSY */\r
- heth->State = HAL_ETH_STATE_BUSY;\r
-\r
- /* Scan descriptors owned by CPU */\r
- while( ( ( pxDescriptor->Status & ETH_DMARXDESC_OWN ) == 0ul ) && ( ulCounter < ETH_RXBUFNB ) )\r
- {\r
- uint32_t ulStatus = pxDescriptor->Status;\r
-\r
- /* Just for security. */\r
- ulCounter++;\r
-\r
- if( ( ulStatus & ( ETH_DMARXDESC_FS | ETH_DMARXDESC_LS ) ) == ( uint32_t )ETH_DMARXDESC_FS )\r
- {\r
- /* First segment in frame, but not the last. */\r
- heth->RxFrameInfos.FSRxDesc = pxDescriptor;\r
- heth->RxFrameInfos.LSRxDesc = ( ETH_DMADescTypeDef *)NULL;\r
- heth->RxFrameInfos.SegCount = 1;\r
- /* Point to next descriptor. */\r
- pxDescriptor = (ETH_DMADescTypeDef*) (pxDescriptor->Buffer2NextDescAddr);\r
- heth->RxDesc = pxDescriptor;\r
- }\r
- else if( ( ulStatus & ( ETH_DMARXDESC_LS | ETH_DMARXDESC_FS ) ) == 0ul )\r
- {\r
- /* This is an intermediate segment, not first, not last. */\r
- /* Increment segment count. */\r
- heth->RxFrameInfos.SegCount++;\r
- /* Move to the next descriptor. */\r
- pxDescriptor = ( ETH_DMADescTypeDef * ) ( pxDescriptor->Buffer2NextDescAddr );\r
- heth->RxDesc = pxDescriptor;\r
- }\r
- /* Must be a last segment */\r
- else\r
- {\r
- /* This is the last segment. */\r
- /* Check if last segment is first segment: one segment contains the frame */\r
- if( heth->RxFrameInfos.SegCount == 0 )\r
- {\r
- /* Remember the first segment. */\r
- heth->RxFrameInfos.FSRxDesc = pxDescriptor;\r
- }\r
-\r
- /* Increment segment count */\r
- heth->RxFrameInfos.SegCount++;\r
-\r
- /* Remember the last segment. */\r
- heth->RxFrameInfos.LSRxDesc = pxDescriptor;\r
-\r
- /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */\r
- heth->RxFrameInfos.length =\r
- ( ( ulStatus & ETH_DMARXDESC_FL ) >> ETH_DMARXDESC_FRAMELENGTHSHIFT ) - 4;\r
-\r
- /* Get the address of the buffer start address */\r
- heth->RxFrameInfos.buffer = heth->RxFrameInfos.FSRxDesc->Buffer1Addr;\r
-\r
- /* Point to next descriptor */\r
- heth->RxDesc = ( ETH_DMADescTypeDef * ) pxDescriptor->Buffer2NextDescAddr;\r
-\r
- /* Return OK status: a packet was received. */\r
- xResult = HAL_OK;\r
- break;\r
- }\r
- }\r
-\r
- /* Set ETH HAL State to Ready */\r
- heth->State = HAL_ETH_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK( heth );\r
-\r
- /* Return function status */\r
- return xResult;\r
-}\r
-\r