Sync FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP with the version in GitHub at (23665258ca...

[freertos] / FreeRTOS-Plus / Source / FreeRTOS-Plus-TCP / portable / NetworkInterface / STM32Fxx / readme.txt

diff --git a/FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/NetworkInterface/STM32Fxx/readme.txt b/FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/NetworkInterface/STM32Fxx/readme.txt
index 73fd553a0dd3f37d9ffbfff0d9aedbef82242c9e..51170c041006a99acc5635494927874053f2923e 100644 (file)
--- a/FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/NetworkInterface/STM32Fxx/readme.txt
+++ b/FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/NetworkInterface/STM32Fxx/readme.txt
@@ -18,3 +18,43 @@ It is assumed that one of these words are defined:
        STM32F439xx\r
 \r
 The driver has been tested on both Eval and Discovery boards with both STM32F4 and STM32F7.\r
+\r
+Recommened settings for STM32Fxx Network Interface:\r
+\r
+// Defined in FreeRTOSIPConfig.h\r
+\r
+#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES   1\r
+#define ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM        1\r
+#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM        1\r
+#define ipconfigZERO_COPY_RX_DRIVER                   1\r
+#define ipconfigZERO_COPY_TX_DRIVER                   1\r
+#define ipconfigUSE_LINKED_RX_MESSAGES                1\r
+\r
+// Defined in stm32f4xx_hal_conf.h\r
+#define ETH_RXBUFNB                                   3 or 4\r
+#define ETH_TXBUFNB                                   2 or 3\r
+#define ETH_RX_BUF_SIZE                               ( ipconfigNETWORK_MTU + 36 )\r
+#define ETH_TX_BUF_SIZE                               ( ipconfigNETWORK_MTU + 36 )\r
+\r
+The best size for 'ETH_RXBUFNB' and 'ETH_TXBUFNB' depends on the speed of the CPU. These macro's define the number of DMA buffers for reception and for transmission.\r
+In general, if the CPU is very fast, you will need less buffers. You can obtain an estimate empirically.\r
+\r
+The optimal value of 'ETH_RX_BUF_SIZE' and 'ETH_TX_BUF_SIZE' depends on the actual value of 'ipconfigNETWORK_MTU'.\r
+When MTU is 1500, MTU+36 becomes a well-aligned buffer of 1536 bytes ( 0x600 ).\r
+When MTU is 1200, MTU+48 will make 1248 ( 0x4E0 ), which is also well aligned.\r
+\r
+Having well aligned buffers is important for CPU with memory cache. Often the caching system divides memory in blocks of 32 bytes. When two buffers share the same cache buffer, you are bound to see data errors.\r
+\r
+Without memory caching, let the size be at least a multiple of 8 ( for DMA ), and make it at least "ipconfigNETWORK_MTU + 14".\r
+\r
+The driver contains these files:\r
+\r
+       stm32fxx_hal_eth.c\r
+       stm32f2xx_hal_eth.h\r
+       stm32f4xx_hal_eth.h\r
+       stm32f7xx_hal_eth.h\r
+       stm32fxx_hal_eth.h\r
+\r
+These files are copied from ST's HAL library. These work both for STM32F4 and STM32F7.\r
+Please remove or rename these files from the HAL distribution that you are using.\r
+\r