***IMMINENT RELEASE NOTICE***

[freertos] / FreeRTOS / Demo / CORTEX_A5_SAMA5D3x_Xplained_IAR / main.c

diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
index eb80168a40e3e79f48c286e6a78888655c285d33..6d78b45398fc8c9f1f579a886e8bf028d4b3d36c 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.0 - Copyright (C) 2014 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -81,8 +81,6 @@
  *\r
  */\r
 \r
-#warning Things to document 1) configFPU_D32 setting,  2) flops can't be used in ISRs, 3) Level interrupts need to be cleared in their handling functions 4) Notes on tailoring generic Cortex-A port 5) assert() will hit if CDC is hammered.  6) Barrier instructions in A9 callbacks.  7) In thumb mode the "common sub expression elimination" optimisation cannot be used.\r
-\r
 /* Scheduler include files. */\r
 #include "FreeRTOS.h"\r
 #include "task.h"\r